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Technology Stocks : Advanced Micro Devices - Moderated (AMD)
AMD 206.31+4.1%10:28 AM EST
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To: combjelly who wrote (133651)9/24/2004 4:55:34 AM
From: TGPTNDRRead Replies (1) of 275872
 
CJ. Re: <I don't think static leakage in the caches is the answer. If so, then the 35 watt mobile chips wouldn't exist.>

Forgive me if I'm wrong, but is there such a thing as 'static leakage' in cache? Doesn't cache refresh at chip clock rate, or some constant divisor, making power consumption some function of clock rate -- even in the absence of moving data around? (I haven't made it to chapter 8 yet.)

Re: <So if they can't get a premium for faster chips, they might as milk what they can out of 90nm. Or some combination of both. Or neither.>

I'm of the opinion that AMD is trying to sell it's chips to maximize total revenue over time. But you also learn by doing and so install new processes with the full knowledge that initially they will be less productive -- in $ terms -- than the prior generation.

To me the Sempron 3100+ indicates current 90Nm production is inefficient for both top end and mobile in quantity (or they've maxed-out mobile sales). I guess I can't have a problem with that. This is, after all, practice on a large scale.

I took introduction of 90Nm first in mobile as an indication that power, not clock, was first scaling criteria for the generation. I think I'd like to see what happens if one runs a 3100+ at mobile clock rates.

But I think I'd bet that if they cut the rate of the L2 power consumption would drop substantialll.

-tgp
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