ARM, Synopsys, UMC Team For Low-Power SoC Solution Online staff -- 11/8/2004
Electronic News
ARM, Artisan Components, National Semiconductor, Synopsys and UMC today revealed they are collaborating to deliver a low-power, energy-efficient SoC demonstrator for the ARM926EJ-S processor.
This collaboration between the five companies aims at power savings by linking each company’s respective power-saving technologies into an integrated power reduction solution, expected to demonstrate up to 60 percent energy savings. It is hoped these power savings will translate directly into the longer battery life required by the fast growing hand-held/portable markets for 3-D graphics, video/audio and communications, the companies said.
Known as ULTRA, the UMC low-power technology reference using the ARM926EJ-S processor technology demonstrator is to be implemented in UMC’s 130e Fusion process, a 130nm process designed for the integration of high-speed and low-leakage transistors in a single CMOS process.
ULTRA incorporates ARM’s intelligent energy manager technology and National’s PowerWise advanced power controller with an integrated hardware performance monitor to reduce overall power and energy consumption. These technologies allow the system to implement adaptive voltage scaling and frequency scaling for the lowest voltage and frequency required to meet software deadlines while maintaining user quality, according to the companies.
As for Synopsys’ part, its Galaxy design platform provides the low-power design implementation flow including multi-voltage and multi-frequency optimization, its DesignWare library for AMBA bus and peripheral IP is to implement a complete SoC. Further, Synopsys’ professional services will provide the RTL-to-tapeout design services for the demonstrator chip using this low-power methodology.
Artisan’s Metro platform serves as the underlying physical IP to enable the low-power technology demonstrator design, which
includes standard cells, I/Os, memories, phase locked loops and other mixed-signal cells designed for low dynamic and leakage power at any voltage.
Finally, the technology demonstration will be made possible by using UMC’s 130nm Fusion process, which combines high-speed and low-leakage transistors onto a single chip to create a low-power solution while minimizing performance trade-offs. An embedded version of the ARM926EJ-S processor has already been silicon-proven in UMC’s process.
Beginning early next year, the technology demonstration will be exhibited at select tradeshows and will include a finished SoC, a demonstration printed circuit board and software. |
