SI
SI
discoversearch

We've detected that you're using an ad content blocking browser plug-in or feature. Ads provide a critical source of revenue to the continued operation of Silicon Investor.  We ask that you disable ad blocking while on Silicon Investor in the best interests of our community.  If you are not using an ad blocker but are still receiving this message, make sure your browser's tracking protection is set to the 'standard' level.
Technology Stocks : Advanced Micro Devices - Moderated (AMD)
AMD 231.83+1.7%Jan 16 9:30 AM EST

 Public ReplyPrvt ReplyMark as Last ReadFilePrevious 10Next 10PreviousNext  
To: Elmer Phud who wrote (148651)1/21/2005 1:58:57 PM
From: burn2learnRead Replies (2) of 275872
 
Elmer just a few items to screw with you numbers. I'm thinking along what Doug has been posting recently.

Assume these variables
Btq high bin P4 parts suffer 30-40% Le loss. these are the die left over after defetcts considered and are testable. So a high bin P4 part = 256 DPW from your numbers
428*0.6=256 GDO or ~$9.3. of these parts only some fraction make top bin (maybe 10-20% when times are good).

Smithfield, if it is two die connected then
since not BTQ they have LE (litho expose) loss ~1-2% of testable die.
428*098 =419GPW at sort

the real question is how do you connect the die. Can you match separate die on the wafer in such case

(419/2)/2400 =$11.4 of course some die wont match and would be should as 3.0 gig parts.

but if die have to be next to each other on the wafer you still get $11.4 but a mix of single core and dual core parts because not all die have functional die next them. On top of that I'm sure the die would have to be matched at some performance level to be a DC product.

I think Intel has a better chance of getting more DC parts than top bin SC parts thus cost less to consumer. fatter sweet spot
Report TOU ViolationShare This Post
 Public ReplyPrvt ReplyMark as Last ReadFilePrevious 10Next 10PreviousNext