Intel Corporation (INTC) Message Board

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Technology Stocks : Intel Corporation (INTC)

INTC 36.16

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To: Reseller Mike who wrote (181323)	5/23/2005 1:55:49 PM
From: Elmer Phud	Read Replies (1) of 186894

Mike You ask a complicated question. Traditionally Yield has been defined as functional die at wafer sort. Failing devices have been mostly due to particles although a couple of other companies who's names are comprised of 3 letters may have suffered significantly from other failure mechanisms. The ability of a test program to screen out bad units can be modeled and predicted. In the past the model used was called the stuck-at model, where potential defects would be modeled as if the defect looked as though a node was stuck at either a 0 or 1. They were considered "hard errors". This was very effective and still is the basis of measuring test effectiveness, however other failure mechanisms are now playing a bigger role and new models are needed to test for "soft errors". They manifest themselves as delay on internal signals thus limiting speed if not functionality. As Intel is in the business of making money they would much prefer catching these sort errors at wafer sort, rather than adding expensive packaging only to throw the part away later. In the past it was virtually impossible to screen for these soft errors prior to final test however much work has gone into the topic and there are now effective ways to screen early on. To make a long story short, Intel's yields are based on test screens that test for soft as well as hard errors. Their stated yields reflect that while other companies may not have this capability as yet. The posts here by another person erroniously claimed it was not being done at Intel and he based his reasoning on the extreme difficulty of doing so citing old techniques as examples. 10 years ago he would have been correct, today he isn't.

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