"The silicon in validated by a) simulation of the verilog files"
No. As I said before, your understanding is oversimplified. Simulation of RTL, in basic Verilog, and later with timing back annotation, is usually called "verification", pre-silicon. When you have a silicon, you usually run it on a specialy-designed boards, with all bells and whistles to verify all specified functionality, special (usually non-disclosed to public) test modes, scan modes, with special provisions to vary voltage levels, etc. etc. This is called typically as "[post-silicon] validation". If you deal with the whole platform like Dell does, there are burn-in tests, and huge compatibility tests (with external peripherals). There are also certification tests for each external interface, and Microsoft WHQL tests for each functional block and for entire system. And Dell does all that. On every stage there usually are hundreds of issues, with dozens of bugs, with several bugs that do not have workarounds and who makes the infamous "errata" lists. That's how it works, period.
- Ali |
