EUV is here, says ASML exec
Dylan McGrath
EE Times
(02/21/2006 6:31 PM EST)
SAN JOSE, Calif. — Extreme ultraviolet (EUV) lithography is alive, according to Hans Meiling, ASML's product development manager for EUV systems, who said his company printed sub-40-nanometer resist images using its EUV alpha demo tool Tuesday (Feb. 21).
Delivering a paper at the SPIE Microlithography Conference here Tuesday, Meiling reported progress on a host of EUV issues, including the availability of EUV photomasks, operating wafer and reticle stages in a vacuum environment and in-situ EUV system cleaning.
Both Meiling and Takaharu Miura from rival lithography supplier Nikon Corp. talked about EUV being ready for production at the 32-nm node Tuesday, one day after an Intel Corp. executive, citing a lack of EUV tools and materials, said that the world's largest chip maker would push out EUV and extend 193-nm immersion lithography to the 32-nm node.
Meiling said ASML has taken delivery of seven EUV photomasks, with 13 more on the way. Photomask blanks, he said, meet the requirements for flatness at the 32-nm node. ASML has also demonstrated successful handling of pellicle-less EUV masks with zero added defects, he said.
ASML and partner Philips continue to make progress on an EUV light source employing tin as the target material, Meiling said. The companies are currently building three commercial EUV sources and has several laboratory sources in development, Meiling said. The key issues plaguing this development have been the effectiveness of a debris mitigation system and the robustness of in-situ cleaning process, he said. Using a technology known as in-situ collector cleaning, the companies have demonstrated the effectiveness at preventing tin contamination of the source and also of removing tin from the source, he said.
The incorporation of two separate moving stages — one for the wafer and one for the reticle — is considered one of the more daunting challenges facing EUV. Meiling said Tuesday that ASML has demonstrated the influences of moving stages on tool's vacuum level is negligible, and that wafer stage and reticle stage performance in the vacuum has exceeded 32-nm requirements.
Meiling said that, as of January, ASML's alpha EUV demonstration tool has been ready for setup and qualification. The company is planning to ship demo tools to Albany NanoTech, a university-based R&D center, and European research consortium IMEC during the first half of this year, Meiling said. |
