EUV litho looks strong for 22-nm node -- and maybe 32, says ASML exec
The Semiconductor Reporter
May 18, 2006, 6:10 p.m. EDT
ARLINGTON, Va. -- Chip makers are divided on whether to use extreme ultraviolet or double patterning immersion lithography systems for the 32-nm node, an ASML executive told an International Sematech forum here today.
Martin van den Brink, ASML executive vice president, said memory chip customers seem to prefer EUV for 32-nm processing, while logic customers want single or double patterning immersion at this node. He spoke at the Sematech International Forum on Semiconductor Technology here.
The ASML official said water-based immersion will already meet the lithography needs for the upcoming 45-nm node, and is extendable to just below 40-nm. When the industry moves to 22-nm processing, "EUV seems to be the winner," he added.
ASML has made significant investments in developing immersion and EUV technology.
Both EUV and immersion still face critical issues to be solved, said Scott Hector, Freescale Semiconductor manager of design-for-manufacturing methodology. He said EUV must address flare variation problems, and immersion must tackle the mask error enhancement factor and mask critical dimension control. He said both EUV and immersion lithography camps must work on resist sensitivity and intrafield dose and focus control.
As lithography systems grow more complex, affordability becomes a major issue, ASML's Brink asserted. In 2010, a typical EUV tool will be priced at about $40 million, he projected.
Affordability also is a huge concern for mask-making equipment, the meeting heard. Freescale's Hector said the industry must spend $250 million to develop new mask patterning equipment. But he said if mask tool makers spend their traditional 8% to 12% of total annual revenue of $800 million, this is "sufficient to produce new tools every three to four years."
Shinji Okazaki, director of EUV process technology for Japan's ASET consortium, was not as sanguine. "The mask market size is less than a half that of lithography tools. [External] financial support is indispensable for subsystems development," he warned. "Government funding is needed for the development of subsystems of future masks."
Both speakers stressed that consortia are needed to address affordability issues, especially challenges in mask infrastructure, materials, and resists.
Lisa Su, vice president of IBM's semiconductor R&D center, reiterated the need for greater collaboration in the chip industry to overcome a growing R&D shortfall. She said the annual semiconductor industry revenue is increasing about 6.5% a year, while R&D expenses are growing at 12.2% a year. "We must collaborate to share the R&D cost as we move to 45-nm and 32-nm nodes," she emphasized.
However, she said greater innovation is needed, as well as collaboration. "There is a paradigm shift with innovation overtaking scaling" in continuing down the Moore's Law trajectory, repeating a favorite theme of IBM semiconductor technologists. "Innovation now dominates the performance gains between chip generations," Su said. |
