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Technology Stocks : Micron Only Forum

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To: Skeeter Bug who wrote (53744)	5/24/2006 12:48:52 PM
From: etchmeister	Read Replies (1) of 53903

From what I recall reading 6F2 results in 20% die size reduction relative to 8F2; Micron's early adoption to copper might also provide an advantage in high margin/high performance products Cross-section of 300mm 0.11-micron DRAM showing metal layer formed by damascene process, in which the mandril/form was formed first. The metal then went in and was CMP¡¯d off as opposed to being patterned and etched. Enlarged view shows tungsten gate. Source: Micron Hong Kong 2004 Analyst Meeting, May 2004. Compiled by DigiTimes. Micron believes its implementation of a dual-damascene copper process in its 300mm 110nm production is the first of its kind in the memory market. Apart from creating a higher-performance interconnect, Micron expects the damascene process to scale more effectively at larger wafer sizes, including 300mm. The company also sees the supplier community putting a lot more effort into the development of these processes, as opposed to scaling down aluminum line widths. Lastly, being closer to the logic manufacturers in terms of performance may bring additional pressure on the competition to retool.

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