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Technology Stocks : AMD:News, Press Releases and Information Only!
AMD 214.18-0.5%Dec 31 3:59 PM EST
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To: Brian Hutcheson who wrote (773)9/25/1997 5:00:00 PM
From: Patient Engineer   of 6843
 
Brian, Re: .25 micron K6 easier to ramp than .35.

Others on this thread are more knowledgeable that I am on this topic, but here is my opinion. I suspect that the yield problem AMD is having is not so much related to the K6 design and its large size as it is to the process itself. AMD has almost no experience with chemical mechanical planarization, tungsten local interconnect etc. CMP in particular is an incredible process when you think about it. The K6's large size doesn't make life any easier (since a high defect density can result in exponentially poorer yields for wafers processed with large dies), but I don't think die size is the fundamental problem. The difficulty of the process is the crux issue.

Ramping .25 micron will be very tough for AMD. K6+ small size helps a little, but mastering the underlying process is the key issue. AMD has to take an unstable process (.35 micron), tighten the tolerances and still make it work. They may need to incorporate new lithography equipment as well which adds the complexity of an equipment learning curve. It seems that jumping from .35 micron to .25 micron won't be quite as difficult as the initial jump to .35 micron was, but my guess is it will take several quarters before .25 micron is stable. Q3'98 best case for stable mass production in .25 micron. Q4'98 is more likely.
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