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Politics : Formerly About Advanced Micro Devices
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To: Elmer who wrote (23546)9/26/1997 11:38:00 PM
From: Brian Hutcheson   of 1571810
 
Elmer , I admit that I am not familiar with the details of slot 1 ,
but you made such a general statement that it did not seem logical .
Whether data is transferred in bus cycles or transactions the chipset still has to transfer data main memory to the L2 cache initially and at various times during processing when cache contains old data , whether it recognizes as such or not is beside the point IMO ,
Brian
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