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Technology Stocks : AMD:News, Press Releases and Information Only!
AMD 214.18-0.5%Dec 31 3:59 PM EST
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To: Yousef who wrote (818)9/27/1997 1:33:00 PM
From: NJ   of 6843
 
Yousef:

I read your psots for the past several weeks. You are one of the
few who knows. I am quite impressed.

The following is an viewgraph from AMD public web site. The view
graph was from last year Microprocessor Forum on the process tech
that maked K6

***********************************************************
Designed for AMD Scaleable 0.35 Micron Process

Transistor Channel Length 0.3 Micron

Shallow Trench Isolation (Low Junction Capacitance)

Design Scaleable to 0.25 Micron process

Six Total Interconnect Layers
Local Interconnect (level - 0)
5 Global Interconnect or metal layers

C4 Technology for flip-chip mounting
Low inductance for I/O signals
Improves power distribution and die size

Contains 8.8 Million transistors
****************************************************************
Patient Eng. said that AMD did not CMP and W plug ...

Now try to read the AMD press release:
1) AMD has STI for isolation
2) LI and five layers of metals

Think! Without CMP (a good CMP), No one can stack five layers of
metal. Think more! if foundry like TSMS and UMC can do CMP and
W plug, LI ..) (Proof: search their web sites), isn't is illogical
to think that AMD cannot!!!!
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