Yes you did give an estimate for Intel's yields but I didn't see an explanation for why you thought they were the number you chose. You did an overall analysis and showed (accurately) that there's far more capacity than needed to supply the volumes Intel is known to be shipping if yields were good, but that hardly justifies your conclusion because you can't assume 100% loading, which you apparently did. Otherwise you wouldn't be able to draw any conclusion whatsoever. Based on available information, which isn't much more than Intel's word for it, what reason is there for not assuming they are telling the truth and yields are excellent? After all, they've been shipping volume for over a year now and ramping C2D faster than anyone would have believed they could. That's not a sign of a poor yielding process unless you believe they need all 3 fabs running at full capacity just to produce the number they ship. There's something missing in your analysis and if it's simply that you think Intel is lying then say so but otherwise you're not telling a convincing story.
Intel saying yields are excellent has little meaning. If they said yields on CWM are excellent in all three 65nm fabs and all three fabs are in volume CWM production, I would take notice.
Yields are excellent could easily mean yields in one fab at less than full capacity are excellent. Yields in other fabs could be far below that. Look at it this way, Two of the 65nm fabs have been in volume production for OVER a year now. They both should be at mature yield levels. If that level is 75% as the Otellini article might suggest, there is certainly no reason to hold back on production of CWM in those two fabs.
If one assumes that those two fabs are only 4500W/week (even though they are physically larger than the AMD 65nm fab), they could produce over 37 million CWM in Q4 for sale in Q1. Now, please answer me this. Why would two 65nm fabs that have been in volume production for over a year and at a 75% yield level for CWM not be at full production? But, that is what you are telling me. Explain it, The third fab which I believe began volume production this spring could easily produce an additional 9 million dual core Pentium Ds even at 50% capacity and non mature level yields. And then we have all that inventory. So you have in 2.5 fabs the capacity for more than the entire Q1 07 requirement at 100% dual core and 80+% CWM. But what are the projections. Less than 50% CWM with millions of single core 65nm Celerons and even 90nm Celerons. The disconnect is so large as to be ludicrous. But, as you say, it can be explained if a significant portion of that 2.5 fab capacity is simply sitting idle despite the ability to yield at 75%. Unless some one can put forth a reasonable explanation for this capacity sitting idle, I believe the more likely possibility that the CWM yields are quite a bit below 75%.
My first pass estimate was 45% for CWM and 65% for Cedar Mill
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