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Technology Stocks : Advanced Micro Devices - Moderated (AMD)
AMD 219.51+0.7%12:16 PM EST
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To: Ali Chen who wrote (225597)2/8/2007 4:39:39 PM
From: jspeedRead Replies (3) of 275872
 
Until AMD manages to manufacture caches as big as Intel does (and same low latency), no nitpicking in _raw_IPC_ would regain performance parity, IMO.

This doesn't make much sense. IPC is the average instruction per clock. Executing the instructions includes getting/storing the necessary data.

So cache size is one aspect of the ability to get and store data (effective memory bandwidth). That is, the the bigger the cache the less cache misses you tend to have. Other aspects are cache latency, bus widths, bus speeds, cache hierarchy etc etc ..

So most of AMD's changes were geared toward increasing memory bandwidth in one way or another. In fact one of the changes was to include more cache. Barcelona has 10.5M cache for starters and will be expandable. Woodcrest has 16M total so there's not really that much of a difference between the two.
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