8/22/97 Electronic News
Blended DSP Architectures Resist Categorization
"Faster than a speeding MCU...able to leap DSP barriers in a single chip...it's blended architectures. Yes, convergence is alive and well in the digital signal processor and microcontroller world. The drivers behind this trend include efficiency, flexibility, integration, increased performance or functions per real estate, less real estate, greater throughput and overall system cost. Blended architectures bring other advantages, such as one development environment and flexible software-based functionality. The movement toward blended, or hybrid, architectures is resulting in a number of interesting developments.
One such development comes from Siemens Semiconductor with its TriCore 32-bit load-store Harvard architecture--just launched last week. The TriCore combines the interrupt handling of a microcontroller, the computational power of a DSP, and the price/performance features of a RISC load/store architecture onto a reprogrammable 32-bit single core. Flexibility allows the sustained 130 MIPS rating to deliver 80 MCU/50 DSP MIPS, or 40 MCU/90 DSP MIPS, depending on how load-sharing is implemented in software. Intermixing of both 16- and 32-bit instructions reduce code size, while 16-bit address and data registers enable superscalar execution of programs. For about $15, one of the first TriCore offerings (2Q98) will include one-megabit eDRAM and about 3K bytes SRAM to address off-chip memory bottlenecks. That price should be very competitive. Siemens plans to offer up to 16M eDRAM using a 0.35-micron process, in addition to on-chip flash, OTP and ROM memories. This architecture is based on the Flexible Peripherals Interconnect bus, a core-independent demultiplexed bus with a peak throughput of 800 megabits/second at 100MHz...."
You can read the rest at:
sumnet.com
There is more TriCore info at:
sci.siemens.com
If you need help with the acronyms:
techweb.com
Interesting, first we get FRAM/FeRAM and now we have EDRAM/eDRAM. Or do we?
One would think if eDRAM was indeed EDRAM, it would be newsworthy enough for a Ramtron press release. Bear with me because I am not an EE, nor do I work in the industry, so my observations at times may be erroneous at best. Just short of contacting the author, Siemens, or Ramtron I put together the following:
After searching the Siemens site, I found no mention of EDRAM or eDRAM in any of the literature describing the TriCore technology.
According to the TriCore site: "Developer's tools, including compilers, source level debuggers, and an instruction set simulator, are available now to embedded system designers. VHDL/Verilog models, timing and synthesis shells and verification test tools for customer designs using the TriCore architecture will be available in the first quarter of 1998. This will be followed by the first silicon implementation of the architecture, a system evaluation chip for prototyping and fast time-to-market product releases, in the second quarter of 1998." However, a brief search of the TriCore development tool partner's websites didn't specifically mention EDRAM or eDRAM support in their product literature.
A casual observation would note TriCore is a good application for EDRAM.
"EDRAMs are designed for high performance systems that include communications switches, routers, DSP-based controllers and multimedia engines, disk cache, and embedded computers."
Ramtron is trying to sample its 16Mbit EDRAM by the end of the year. According to the TriCore " Market Roll-Out, Timetable: "The company plans to introduce an evaluation chip based on a TriCore targeted to run at 100 MHz, and system design evaluation boards, in the second quarter of 1998. During the remainder of 1998, Siemens expects to work with customers on fully integrated system designs using the TriCore architecture."
Considering the timetables of both products, the sampling of 16Mbit EDRAMs could coincide with the development of TriCore. And, the current Multibank Burst EDO EDRAM of Ramtron is rated at 100 Mhz.
In addition: "The TriCore architecture takes full advantage of the capability to combine standard cores and peripherals, dense memory and customer-specific logic using sub-micron (0.35m and less) CMOS process technologies that will be readily available through Siemens and other leading IC vendors beginning in 1998." and "Ramtron has recently redesigned the EDRAM to reduce its size by utilizing process improvements at Nippon Steel and IBM so that more products can be produced per wafer and yields can be improved."
This reduction in size could be the "0.35m or less" mentioned above, although I've never seen any mention of Ramtron's current or future EDRAM die sizes.
Gumport has mentioned TI's support of EDRAM in their DSP products, and according to the 6/20/97 Lehman/Gumport Report: "RMTR feels they are making good progress in moving to engage Texas Instruments (TXN) to support 16Mbit EDRAMS for use with DSP chips in late 1997 and, eventually, incorporate EDRAMS within DSP chips."*
Although TriCore is not a DSP, it is the core to which the DSP and microcontroller are added, both applications require memory, so why not approach Siemens?
Well, I still don't know if eDRAM is synomymous with EDRAM, but it could be important because:
(1.) "In-Stat expects the programmable DSP market to surpass $9 billion by 2001, held down only by those blended and core-based products that will be reported under either MCUs, MPUs or ASICs instead of DSPs. (And the above blended chips fall into those categories.)"
(2.) Siemens produces DRAMs and therefore has the ability to become a foundry partner.
(3.) Siemens and SGS Thompson are the top two producers of smart cards and if either of these companies decides to support one of Ramtron's technologies they may decide to support the other.
*Incidentally, an "EDRAM" search of the TI site revealed their DSP development tool partners are supporting EDRAM in their products. However, the information I read did not specifically mention 16Mbit EDRAM. Never-the-less, it's good to know that TI is designing EDRAM into their DSP products . Also, Mr. Carrigan, VP of Sales and Marketing is an ex-Texas Instruments Engineer.
ti.com |
