Cypress to give up advanced CMOS development
by David Manners
Wednesday 28 February 2007
Cypress Semiconductor is following in the footsteps of NXP, Freescale, STMicroelectronics, and Texas Instruments in giving up advanced CMOS process development.
“We’re not investing in lower line width technology. Inside Cypress we call it: ‘Mo more Moore’,” Dr Dinesh Ramanathan, executive v-p for the data communications division at Cypress, told the Globalpress Summit meeting in Monterey yesterday. “90nm will be the last technology node developed inside Cypress,” he said.
“Bleeding edge technology will be for SRAM. Foundries will build those. Grace Semiconductor in China and UMC in Taiwan will be building them on 65nm and lower line widths,” said Ramanathan.
Asked by EW how much Cypress would be saving by the decision, Ramanathan replied: “We will save $100m on capex in not having to buy equipment for the fabs, and our R&D budget will reduce from 24 per cent of revenues to 17 per cent.”
Revenues are around $850 annually, so that’s a $60m saving, but that 17 per cent includes and increase in the software development budget which is needed for Cypress’ new strategy of focusing on programmable chips.
Asked by EW if the foundries could make SRAMs cheaper than Cypress could make them, Ramanathan replied: “We always believed we could make them cheaper until the fabs in China came along because they don’t have to worry about depreciation as much as we do. Either they’re fully depreciated already, or they’re paid for by the government. The prices they give us are significantly cheaper than our costs. Their prices are 15 to 20 per cent less than what we can make them for.”
Having sold off Fab1, Cypress has two fabs left, Fab2 and Fab4. Fab2 is fully loaded, said Ramanathan, and Fab4 is loaded at 75 to 80 per cent of capacity.
The new strategy of going for programmable chips involves Cypress in attracting 15,000 customers for the devices by the end of 2010, said Ramanathan.
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