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Technology Stocks : Advanced Micro Devices - Moderated (AMD)

AMD 194.80

-2.8%

12:01 PM EST

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To: DDB_WO who wrote (227988)	3/19/2007 6:10:23 AM
From: Rink	Read Replies (3) of 275872

AMD's GDC 2007 slide set (with many SSE128 details) By Dresdenboy (Recent posts) Monday, March 19, 2007 3:17 AM EST -------------------------------------------------------------------------------- Slide 24 now clearly tells us, that SSE128 won't make scalar SSE code (and x87 code) faster than it is in K8. So for this kind of code only the other core improvements would apply. The INQ was unfortunately wrong on this. But there wouldn't have been the bandwidth (decode, L1, L/S) to support a sustained double throughput of scalar SSE code. Also the L1 still only supports 64 bit stores. Load latency increased by one cycle. Matrix math will be 85% faster per core. Other math intensive apps gain 10% to 50%. Etc.. Just read yourself. I just found the pdf using google looking for something different :) Link: developer.amd.com -------------------------------------------------------------------------------- Above post copied from Aces: aceshardware.com DDB, your find made it to the Inq: uk.theinquirer.net The Inq article mentions 8-core desktops this year. I'm sure this will be in the form of dual socket Torrenza A64 FX boards though. Still it sounds kinda cool. Regards, Rink

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