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Technology Stocks : Advanced Micro Devices - Moderated (AMD)
AMD 233.54-1.8%Nov 7 9:30 AM EST
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To: Sarmad Y. Hermiz who wrote (228913)3/25/2007 7:50:14 PM
From: neolibRead Replies (2) of 275872
 
Here is your original post:

My understanding is that from one wafer to another, there are variations due to random atomic states. Because (at 65 nm and below) there are only a few atoms in each structure, the randon variation in a single atom become significant. So making adjustments (as in AMD's process control method) become less effective, and even self defeating. Because the next wafer does not reproduce the random states of the one where measurements were made.

I've now provided you with a nice article detailing the issues at 65nm which should clearly convince you that there are no structures at 65nm consisting of "only a few atoms in each structure" (please don't come back with gate oxide thickness, I've already given you an eyeball estimate of 200K +/-40K atoms there), and there is no dependence on "variations due to random atomic states", and further that NOTHING depends on "the random variation in a single atom". If you can't understand that, stay away from commenting on device physics.

When did I say they were not ?

Read your own post about energy levels.

I said this inherent random variation can be accounted for in the design.

In the original post quoted above you were talking about AMD's manufacturing procedure, not circuit design. Do you now think Intel has figured out circuit design to tolerate 65nm manufacturing while AMD cannot?
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