I have been doing a little research on this stock and one other after I have seen both company's stock crash and burn. I like the financials of ACTL and OCAD, but i have some reservations that i thought I'd share. ACTL, and another stock that got hammered this week: OCAD both are heavy in the FPGA biz (field programmable grid array) from what I understand this is a function of a semiconductor to relieve bottlenecks, and is used by every electonic component known by man. I recently came acroos this article in EE times:
September 29, 1997, Issue: 973
Section: Technology
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Silicide phase change used to break connections -- PROM fuse design
scales to sub-0.25 micron
By Gail Robinson
Hillsboro, Ore. - Fuse elements used in PROMs are the simplest and most
compact means of introducing a programmable wiring scheme on silicon
chips. While the flexibility of using a programmable element could
address a variety of circuit-design applications, the traditional use
has been largely confined to memory arrays due to the problems created
when the fuse is blown. Now a technique being devised at Intel Corp.
here based on a phenomenon known as silicide agglomeration, may
eliminate many of the complications of PROM fuses, making them available
virtually anywhere in highly dense CMOS logic circuits.
"Not only is the process flow the same, but you don't have to worry that
when you program the element--that is, blow the fuse--you are creating
damage in the die around that area," said Mark Bohr, director of
process, architecture and integration at Intel. "With fuse technologies
you had to remove the covering material, besides requiring an extra
processing step, it incurred some reliability risk. In addition, the
etched hole gives a path for a contaminant to enter the die." Bohr and
colleague Mohsen Alavi will details their work at the International
Electron Devices Meeting in Washington in December.
For microprocessors a programmable element would be advantageous in a
number of applications. One is die identification -where the chip would
be electrically tested to find out what type of die is inside the
package. Blowing different programmable fuses could be done at the
factory to create a unique identifier that could be retrieved in the
field.
Also, it could be used to program specific features such as how the chip
interacts with the system through I/O ports. The advantage is having a
single mask set and one process flow in the fab with the ability to
program the part to operate in a slightly different way later.
Other approaches for programmable logic are based either on special
processing, such as non-volatile E2PROM floating gates or, as in the
case of static RAM cells, bulky transistor configurations. FPGA arrays,
for example, employ static RAM cells that require a minimum of six
transistors.
But the PROM fuse is simply a piece of wire that breaks when hit with a
high current, and therefore represents the ultimate in size and
simplicity. The fuse structure is already in the process flow in many
new technologies, including Intel's logic technologies.
The company uses a silicide layer to coat the polysilicon gate
electrode. Titanium silicide is formed in a salicide ( self-aligned
silicide) fashion, the polysilicon gate layer is deposited and
patterned, and then a titanium layer is sputtered over the entire
surface of the wafer. The wafer is later heated, causing the titanium to
react in those areas where it touches the silicon. It collectively forms
the titanium silicide layer. Wherever the titanium is on top of oxide it
does not react and thus the titanium or a titanium-nitride compound is
left. This can be selectively etched away, leaving the titanium silicide
on top of polysilicon while being removed from regions where there is no
polysilicon.
In the process flow, the researchers form titanium silicide on top of
the polygate layer to form a low resistance layer that is beneficial for
transistor performance. In the development process, they discovered that
when drawing a high current through a small silicide structure, most of
the current goes through the titaniun silicide. If too much current goes
through, the silicide heats up and begins to agglomerate, balling up
into clumps that become discontinuous, which interrupts the current
flow.
This was the fusing action that Bohr was looking for; it is more benign
than simply burning out a metal wire. "We wanted the silicide layer to
become discontinuous so that the current no longer flows through it and
then the structure becomes highly resistant," said Bohr.
The key was to take the polysilicon silicide line and change its
resistance from the normal low resistance value to a very high
resistance, rather than physically breaking the connection. "This was
one of those serendipitous situations where the need for a silicide
layer for low resistance can also be applied in a fuse structure.
Luckily the primary material that we want to use-titanium
silicide-happened to have very desirable agglomerationF properties,"
said Bohr.
Other silicide materials may also have this property, though they are
not covered in the paper. "We believe that this is a scalable fuse
technology that will work very well on future technologies with smaller
line width and with other silicide materials," he said. The technique
has already been proved in a state-of-the-art 0.25- micron process.
Intel is currently using the technology in its microprocessors and
static RAM memory chips in the quarter-micron generation, and Bohr
acknowledged that it will be applicable to future generations. "We
expect to use the technology in future memory devices for programming
redundant elements to improve overall yield," he said. In addition, the
method could be used in other logic types to add flexibility.
Copyright (c) 1997 CMP Media Inc.
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...I started believing that the dramatic price erosion for ACTL & OCAD were not simply missing eps, but something bigger. I believe this is the "bigger". This technique called PROM is directly in the path of FPGA technology, and Intel is behind it. |
