Advanced Micro Devices - Moderated (AMD) Message Board

STOCKTALK

We've detected that you're using an ad content blocking browser plug-in or feature. Ads provide a critical source of revenue to the continued operation of Silicon Investor. We ask that you disable ad blocking while on Silicon Investor in the best interests of our community. If you are not using an ad blocker but are still receiving this message, make sure your browser's tracking protection is set to the 'standard' level.

Technology Stocks : Advanced Micro Devices - Moderated (AMD)

AMD 240.58

-2.5%

3:59 PM EST

Public Reply Prvt Reply Mark as Last Read File

Previous 10 Next 10 Previous Next

To: wbmw who wrote (238891)	8/16/2007 3:50:01 PM
From: Petz	Read Replies (1) of 275872

Why don't you follow your own advice instead of hurling another insult at cj? Does the entire core have to be redesigned everytime the HT spec is extended, or if the memory controller external interface is changed? The answer is no, the K8 core was changed very little to accomodate DDR2 vs. DDR and to support HT 2.0 vs. HT 1.0. As with anything isolated by the crossbar. Your "any engineer knows" is just a bunch of hot air. EDIT - I see you've backed down from your "core" assertions a bit. One thing you seem to have forgotten is that AMD already told us the L3 is designed to handle more address bits. Petz

Report TOU Violation

Share This Post

Public Reply Prvt Reply Mark as Last Read File

Previous 10 Next 10 Previous Next