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Politics : RAMTRONIAN's Cache Inn
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From: NightOwl9/23/2007 3:57:00 AM
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They held a PCM flagellant confab in Santa Clarita recently to paper over the re-re-re-projection of PCM ramp date to 2010.

But with performance specs like these they may as well have stayed home:
Other presenters agreed that PCM is attractive in its cell size, die size and cost. It offers ~50 nsec read performance, has unlimited read endurance, ~10-year data retention, ~100 nsec write performance, and is CMOS compatible. It exceeds current flash technology in terms of its bit-level write capabilities, requires no erasing before writing, and has a ~10^8 cycles of write endurance.
semiconductor.net

I guess its even true for commodity semi conductors... you get what you pay for.

Frankly if this pitiable performance is the price of great "scalability"... one has to wonder why anyone would bother. Somebody should ask these PCMers why anyone would give up FLASH or DRAM at 45nm in order to use PCM that might "scale to 2nm"... but only performs like high end EEPROM? Whose calling trump... is it price or performance?

I predict that by the time the Fabs pull the switch on the 18nm node, there will only be one consortium of mega companies capable of producing cutting edge designs... No one outside the consortium will like this a will persuade their countries to boycott any consortium products... This will initiate a major trade war leading to WWVI and the end of civilization.

And by 2020... the only IP anyone will want will be those conducive to safe and cozy subterranean living. Well... at least cozy anyway. :)

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