Buggi,
One last thing to mention. I still don't know, how Eclipse2
should work in Serversystems with DRAM. This whole topic
is clowded in heavy dust for me. If I understand it right,
Eclipse2 should be extremly fast (read/write too) otherwise
this wouldn't make sense. And with current low DRAM prices,
NOR prices has to be cheap too just to make such a product
happen. Again, I haven't understood what they want to do
here and were the difference between this design and an SSD
is. I see its on a much "lower hardware level", very
integrated into the system and very DRAM-near, but again,
I don't know how this should work and what the key benefits
are. For me, the SPECS (NOR) has to be so good to make this
happen, that I can't believe SPSN could reach this with
Eclipse2. Would be too good to come true.
Primary considerations for this new aproach are power consumption and cost. DRAM needs to be continuously refreshed, burning power even when nothing is going on. Flash uses no power. The power considerations start to add up if you increase memory size greatly.
As far as costs, Spansion claims that Mirrorbit flash cell is fundamentally more efficient to produce. That may be true, but to fully realize this benefit, Spansion will have to have process technology node parity with DRAM, and would have to be much closer in scale to large volume DRAM manufacturers.
As you know, we have exchanged some posts (and with Pam as well) on advantage of manufacturing at large scale. As if Spansion read our minds (or read this BBS), Spansion quantified it. Just by going from 2k wafers from 8k wafers, 28% cost savings can be realized. And these are just wafer costs, as in cost of sales. The R&D, and other administrative costs (per wafer or per die) decline even more dramatically. You can easily say that by going from 2k to 8k wafers, the associated R&D costs per wafer drop 75%.
Of course, there is some value to be running at full capacity. The incremental expenses to increase capacity, up to fully equipped fabs become smaller and smaller compared to cost incurred to get the initial production going. Also, if you are going to be depreciating the building itself, it is better when the charges are applied against full capability of the building rather than a portion.
So anyway, we don't know where we are today, as far as costs are concerned vs. DRAM, but if the Mirrorbit memory cell is much more efficient than DRAM cell, and Spansion executed on the roadmap to become the lowest cost producer, a lot of doors will open.
Now, one thing about margins, Fab 25 vs. SP1:
It seems to me that both Fab 25 and SP1 are in (some) 65nm production. 65nm sales in Q4 were somewhere between NIL and very small. IMO, Spansion shipped the product from Fab 25, in order to avoid (delay) hitting the income statement with SP1 depreciation. As a result of this (and rising sales) margins went up.
There is going to be a seeming (reporting) set back in Q1, in margins as SP1 depreciation starts and SP1 output is still relatively small.
Looking striclty at the income statement and balance sheet, things won't look great. But like Spansion did in CC, you have to ask a question, or compare Spansion with or without SP1. Spansion financials would surely look better without SP1, but without SP1, Spansion would be only a little better than a Numonyx. With SP1, Spansion will become a dominant NOR player, IMO reaching 50% of the market in next 18 to 24 months.
Joe |
