The Samsung SONOS patent seems to use NROM effects in further embodiments of the present invention for 2b/c.
The only new thing seems to be that it uses recessed channels.
Shame the pictures aren't included anywhere.
At some moment especially if SONOS / charge trapping prevails like I think it will Spansion and others might get into a patent fight. This patent for example seems to build on at least one previous patent by Eitan/Saifun. EDIT: It's clear that is what Spansion is sorta expecting too: "We think that right now, the key leading NAND flash companies will be moving to technology that is similar to MirrorBit," Cambou said, "so we have an opportunity to help that transition by licensing our technology…enabling Spansion to diversify into NAND and the licensing business." From the time ORNAND2 was announced: sst.pennnet.com
From that same old announcement there's another interesting bit I had forgotten about: Cambou characterized the ORNAND design as a NOR core with a NAND footprint. In the NAND-type of design -- the cell voltage is less and fewer transistors are needed in the periphery, he told WaferNEWS. Because the SONOS ORNAND architecture uses 25% fewer manufacturing steps than the NOR technology (at the same technology node), the manufacturing flow can be simplified by eliminating steps. Additionally, because of the smaller cell size (for NAND, i.e., greater density), Cambou said that ORNAND costs are 50% of those of NOR, when compared in the same factory.
This might imply that Eclipse and Mirrorbit won't be using this newer technology.
Also this might mean ORNAND2 is more squarly aimed at competing with pure NAND while ORNAND1 is only competes in niches like NOR/NAND MCP's.
Lastly and most clearly ORNAND2 is a good bit denser than ORNAND1 at the same process node, provided that the article uses correct quotes.
Regards,
Rink
Second source; same text though: patentgenius.com |
