Brian, All - MS/DW about tomorrow's presentation
09:00am EDT 13-Oct-97 Morgan Stanley\DW (Edelstone/ Cross/Gerhardy) NSM INTC AM
SEMICONDUCTORS: KEY NEW MICROPROCESSORS FROM AMD, CYRIX, AND INTEL, AND.../P1
Technology (I/CPR): Semiconductor Industry Report: Key New
Microprocessors From AMD, Cyrix, And Intel, And New DRAM Technology
From Rambus Will Be Unveiled At The Microprocessor Forum This Week
Mark Edelstone/John Cross/Louis Gerhardy (415) 576-2381/2382/2391
Date: October 13, 1997
Type: Industry Overview
______________________________________________________________________
KEY POINTS
On October 14 and 15, Advanced Micro Devices (AMD--$30, rated
Outperform), Cyrix, Intel (INTC--$93, rated Outperform), and Rambus
(RMBS--$56, rated Neutral), will discuss key new technologies at the
annual Microprocessor Forum in San Jose, California. While we believe
the strength of third-quarter earnings results and expectations for
fourth-quarter demand trends should have a more meaningful impact on
the performance of their stocks through the end of the year, we expect
the companies' results and subsequent stock-price performance during
the next two years to be highly dependent on the success of these new
products.
Intel Will Likely Be The Highlight Of The Conference_
Given its dominant position in the microprocessor (MPU) market, Intel
usually represents the highlight of the MPU Forum, and this year's
event promises to be no different. While Intel is currently in the
process of driving its Pentium II MPU into the mainstream PC market,
we believe the company will discuss its next three generations of MPU
technology at the Forum on October 14. These three processors are
currently code named Katmai, Willamette, and Merced. While the high
volume Pentium II MPU product from Intel will be the 0.25-micron
version (code named Deschutes) that is expected to be introduced in
the first quarter of 1998, Katmai is expected to be introduced in the
latter part of 1998. Katmai will represent the fourth product within
Intel's sixth generation Pentium Pro/Pentium II MPU architecture.
Katmai is expected to add larger on-chip cache memory and implement
Intel's second generation MMX instruction set to improve 3D graphics
performance. Katmai can be expected to initially be introduced with
clock speeds of 400 and 450 MHz, however, they should increase to 750
MHz when Intel completes a shrink with its 0.18-micron process
technology in 2000.
Willamette Is The Next Generation In Intel's 32-Bit Architecture. If
Intel were still using its numbering nomenclature, Willamette would
have been called the 786. However, since Intel is using more formal
names to brand its processors, we would not be surprised if the
company calls Willamette Pentium III when it is ready to enter volume
production in 1999. Willamette represents Intel's seventh generation
MPU core, and similar to the Pentium II, we expect Intel to offer this
new MPU in a cartridge with SRAMs and other components. As Intel's
MPUs have increased in performance and complexity, the company has
opted to only deliver them in a complete cartridge system, which
should enable OEMs to ramp them into production faster. In addition,
we believe this strategy creates additional barriers to entry and
makes it more difficult for Intel's competitors to provide the
infrastructure necessary to compete in the PC market.
We expect Willamette to initially be ramped up with Intel's 0.25-
micron process technology, followed by shrinks to 0.18 and 0.13-micron
processes during the remainder of its product cycle. When
manufactured on the same process technology and when running at the
same internal speed, we believe Willamette will offer a 30-50%
increase in performance over Deschutes. While the high end of Intel's
Pentium II MPU family currently offers peak performance of 300 MHz, we
expect Willamette to eventually exceed 1GHz performance.
Merced Represents Intel's First 64-Bit MPU. Although we expect
Willamette to represent Intel's high-volume MPU product offering in
the early part of the next decade, Merced should help Intel break new
ground and add a layer to the company's existing MPU strata. Merced
is being co-developed with Hewlett Packard, and it will be the first
implementation of the IA-64 (64-bit Intel Architecture), and we
believe it will be introduced in 1999. Unlike prior generations of
Intel's processors, we believe the extremely high-performance
characteristics of Merced will position it in the workstation and
server product categories for quite some time. Merced is expected to
debut with 900 MHz clock speeds, and we believe the initial devices
will utilize Intel's 0.18-micron process technology.
Provided Intel can achieve its performance objectives, we believe the
company will finally have a MPU architecture that can offer
performance levels that are comparable to the highest performance
proprietary RISC architectures, such as Alpha, MIPS, Power PC, and
SPARC. In native mode, our current expectation is that Merced will
double the integer code performance and quadruple the floating point
code performance of Willamette. Since we believe Merced will be much
more expensive than Intel's traditional 32-bit MPUs at the time of
introduction, they will likely be confined to niche applications for a
couple of years. However, when combined with the high-volume
potential of Willamette, Intel's served market should expand, and its
average selling price should increase as well.
_But Super Socket 7 And AMD's K6 Roadmap Are Critical To The Company's
1998 Earnings Potential
The first member of AMD's K6 MPU product family entered volume
production in the first half of this year, and the company sold one
million units in the third quarter. While AMD still needs to solve
some of its yield problems to realize its earnings potential in the
fourth quarter of 1997 and throughout 1998, the company will formally
unveil its K6 product roadmap at the Forum on October 14. We expect
AMD to discuss three new versions of the K6, and each one will be
produced with the company's 0.25-micron process technology. Since all
three versions will offer smaller die sizes than the current 0.35-
micron version, AMD's unit volume potential should increase by a
factor of two to three, while its overall unit production costs should
be cut in half. Given strong initial demand for K6, we believe
manufacturing execution and the transition to 0.25-micron during the
next several quarters will be the key issue driving AMD's potential
earnings power in 1998.
AMD Will Discuss Multiple Versions Of Its K6 MPU. The first new K6
version is a linear shrink of the 0.35-micron K6, and by reducing the
die size and voltage, it should enable AMD to address the notebook PC
market. Given K6's performance characteristics, we believe it should
compete effectively with Intel's Tillamook, which is the company's
0.25-micron Pentium with MMX technology designed for the notebook
market. While the notebook K6 MPU version is quite straightforward,
we believe the two other derivatives will be more challenging for OEM
customers to implement in their PCs.
To date, all of AMD's and Intel's MPUs have peaked out with a system
bus of 66 MHz, and we believe AMD will ramp a K6 version with a 100MHz
system bus in the first half of next year. While AMD can be
expected to increase the internal K6 frequencies to 400 MHz by the end
of next year, the increase in the system bus to 100 MHz should promote
significantly greater PC performance levels. However, since Intel
will not support anything beyond a 66 MHz system bus within the socket
7 infrastructure, AMD and its chip set and motherboard partners will
be forced to innovate by themselves. In addition to increasing the
system bus speed to 100 MHz, we believe AMD will also discuss a K6
version that implements a second generation MMX instruction set that
will eventually compete with Katmai.
National Semiconductor Should Benefit From Cyrix's Media GX Product
Roadmap
In addition to trying to compete with Intel at the high end of the
market, Cyrix has successfully pioneered the low end of the MPU market
with its highly integrated Media GX MPUs. By incorporating a 2D
graphics controller into its MPU architecture, Cyrix has enabled
companies like Compaq to introduce very cost sensitive ($699) PCs this
year. We currently expect National Semiconductor to complete its
acquisition of Cyrix during the last two weeks of November, and when
combined with Cyrix's MPU cores, National should be able to eventually
add core logic and/or networking functionality to these cores. While
National may be able to discuss these type of solutions at next year's
Forum, we expect Cyrix to unveil its next generation Media GX MPU on
October 14.
We Expect Direct Rambus DRAMs To Follow Synchronous DRAMs As The Main
Memory For PCs
While most of the presentations at the Forum will discuss future MPU
designs, Rambus is due to formally introduce its Direct Rambus DRAM
architecture on October 15. As MPU performance increases, the speed
of main memory becomes one of the critical bottlenecks constraining
the performance of PCs. Direct Rambus DRAMs will double the width of
the memory's controller interface to 16 bits, and it will incorporate
protocols that will allow MPUs to access four to eight times as many
banks of memory as today's synchronous DRAMs (SDRAMs). The DRAM
architecture has evolved from Fast Page Mode to Extended Data Out
DRAMs, and as the system bus increases to 100 MHz, SDRAMs should begin
to take over the PC main memory market next year. However, given
Intel's endorsement, we believe Direct Rambus DRAMs will start to
become the main memory device used in PCs in 1999 and beyond.
Virtually all of the major DRAM companies have started to design
Direct Rambus DRAMs, and Intel is working on a core logic chip set
that will support this new architecture. Although double data rate
SDRAMs and SyncLink DRAMs are still trying to compete for the next
generation DRAM architecture, we believe Intel's decision to only
support Rambus with its core logic chip sets should make it the de
facto standard. Most of the leading DRAM suppliers have already
stated their plans to introduce Direct Rambus DRAMs by the end of next
year. Given the momentum behind Direct Rambus DRAMs, we expect it to
account for at least one third of the overall DRAM market in five
years, and Rambus' concomitant royalty stream should significantly
enhance the company's earnings power at that time. |
