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Tuesday October 14 12:03 PM EDT
Company Press Release
Cyrix Unveils Architecture for Next Processor Core
Enhanced Floating Point and MMX Technology to Deliver Industry-Leading 3D and Multimedia Performance
RICHARDSON, Texas--(BUSINESS WIRE)--Oct. 14, 1997--Cyrix Corporation (NASDAQ:CYRX) today revealed the internal architecture of its next processor core, code named Cayenne, at Microprocessor Forum '97.
Cayenne will feature a fully pipelined, dual-issue floating point unit and 15 new MMX floating point instructions to enable the highest-performance 3D graphics, DVD and 3D audio.
''Future applications will require a no-compromise compute engine with balanced integer, floating point and MMX capability,'' said Robert Maher, vice president of engineering, Cyrix. ''The Cayenne core will deliver industry-leading 3D and multimedia performance for mainstream desktop PCs.''
Boost in Floating Point and MMX Performance
A key component of the Cayenne core is the ability to execute four floating point operations per cycle using dual MMX units. This will deliver over 1 GFLOP peak performance, a first for desktop PCs. In addition, the dual floating point reciprocal and reciprocal-square-root instructions will execute five times faster on Cayenne than on the Pentium(R) II processor. These instructions are used extensively in lighting calculations for 3D image processing.
The net result is that Cayenne will deliver in excess of 10 million meshed triangles per second to an external 3D rendering engine -- more than five times faster than the Pentium II processor. Lastly, Cayenne will deliver single-cycle throughput on standard x86 floating point instructions.
Cayenne Core Summary
The Cayenne core will feature a dual-issue floating point and MMX unit, 64KByte L1 cache, and an enhanced sixth-generation integer unit. Processors based on the core will initially be manufactured using a .25-micron, 5-layer metal process. This includes a C4 process for flip chip assembly. As a result, the core die size is expected to be about 65mm-squared. Processors based on this core are expected to be in production in 2H98 at speed ratings ranging from PR300 to PR400.
Improved CPU and with software solutions for graphix who will need 3D accelerators unless they are very cheep. Hance, Don't look for improvement in margines any time soon. |
