Release:
Spansion Announces 65nm Sampling of MirrorBit(R) Eclipse(TM) Flash Memory Solutions for Wireless Handsets
me:
Well, that's not good. That places them about 1Q behind in their public Eclipse schedule.
Release:
"MirrorBit Eclipse architecture-based MCPs offer exceptional user experience in mid- to high-end mobile phone platforms."
Me:
Fab 25s 90nm Mirror bit solutions will have to continue to carry the company in the most competitive markets until more SP1 capacity comes online. By high-end I think the mean "Smart Phones" and not the ultra high end phones that the NOR/NAND/DRAM guys dominate presently.
Release:
Solutions such as MirrorBit Eclipse MCPs provide greater flexibility for handset OEMs to reduce costs, and enable faster programming and produce innovative feature phones more quickly."
me:
What's this about MCPs? One of the main advantages of Eclipse is that both the NOR and ORNAND use MirrorBit and are on the same chip. Perhaps They're talking about the addition of Qbit which is supposed to be on chip only with 45nm? There may also be some restrictions on the size of chips that SP1 is currently producing so the largest solutions may require separate ORNAND memory in addition to what's on the Eclipse chip itself?
Release:
In addition, the eXecute-In-Place (XIP) interface provides direct access to code and data in the non-volatile memory, and allows handset OEMs to save 20 percent or more on their handset memory subsystem bill of materials costs by reducing the system DRAM footprint used for code shadowing, while experiencing greater design flexibility.
me:
Interesting that their now saying 20 % savings on materials rather than the 30% they were talking about originally. I wonder how much this has to do with the price depression DRAM memory has been going through of late? Also interesting is the "reducing the system Dram foodtprint used for code shadowing". I thought they were eliminating DRAM completely from Eclipse? Maybe that only applies to Eclipse for servers?
Release:
Additionally, MirrorBit Eclipse solutions integrate a programmable microcontroller, which replaces the conventional state machine typically used in Flash memory and also supports built-in self test (BIST). Specifically designed to reduce costs associated with testing, BIST reduces both the test cycle duration and the complexity of the test set-up, which directly reduces the need for automated test equipment (ATE).
me:
Well it seems like they're no longer talking about a partial implementation of BIST, though I suspect that BIST will be evolving to take over more testing functions as time goes by.
I'm not particularly thrilled about the delay, but at least we now have a definite confirmation that Eclipse is sampling.
The release seems to indicate that SPSN, as previously stated by SPSN management, is directing SP1 product at markets with higher ASPs and where 65nm Eclipse has inate advantages such as higher density, etc.
Aside; I always get nervous when these sorts of announcements come close to earnings.
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