HEADLINE: Exemplar Logic Improves Actel FPGA Support
DATELINE: ALAMEDA, Calif.
BODY:
12, 1996--Exemplar Logic (Alameda, CA) and Actel Corporation (Sunnyvale, CA)
today announced an improved design methodology that results in increased
efficiency for Actel FPGA designers.
Exemplar Logic's Galileo version 3.1 has integrated Time Explorer and Logic
Explorer synthesis tools with Actel's Designer Series place and route software
to provide a top-down, easier-to-use design solution. Specifically, Exemplar's
Time Explorer integrates a Standard Delay Format (SDF) reader for post
place-and-route timing analysis, expands VITAL back annotation for ACT 2, ACT 3
and the 1200XL Logic Integrator family, and includes a boolean mapping algorithm
for the 1200XL family. This new algorithm is tailored for Actel's architecture
to improve synthesis results.
Boolean mapping is a technique that allows better performance and resource
utilization for VHDL and Verilog designs. Area and delay optimization results
are 15-20% better than previous pattern matching-based algorithms. Boolean
mapping is an optimization technique that can greatly impact architectures that
utilize extended, high-fan-in logic cells such as Actel FPGAs.
Through Exemplar's Galileo Logic Explorer, designers can quickly implement
high-performance datapath macro functions such as adders, counters, and
comparators using Exemplar's improved ModGen macro generator product. ModGen
incorporates Actel-specific architecture information to produce high performance
macros.
Exemplar Logic's architecture-specific support of Actel's Integrator Series
provides synthesis users a competitive edge when implementing system
applications. Actel's Integrator Series is suited for a wide variety of
applications in the computing, digital processing, and telecommunications
markets. This includes: DSP, ATM networks, embedded systems, and integrating
functions such as high speed buffering, control, and filters.
"Our strategy has always been to work with the best-of-class FPGA providers.
Our improved Actel design support is part of our continuing long-term
relationship. Our companies share technology to provide the best solutions for
our customers," said Bob Barker, Exemplar's vice president of marketing.
"Exemplar's architecture-specific optimization is important for our
customers' success. For the last 5 years, Actel has shared information with
Exemplar Logic about new architectures to insure our customers can use
Exemplar's leading edge synthesis tools for achieving the maximum performance
PAGE 3
Business Wire, February 12, 1996
offered by Actel's parts," noted Gervais Fong, Actel's CAE Relations Manager.
According to Sundar Goplan, Project Leader at Telco (Fremont, CA), "We
picked Exemplar's Galileo design environment and Actel's 1240 for a recent VHDL
design. We found that our high-level design flow and Exemplar's simulation and
synthesis tools worked well together. Our design worked right the first time
and we were able to use one set of libraries across all the tools."
About Exemplar Logic's Galileo Design Environment
Exemplar's Galileo combines synthesis, sophisticated timing analysis, and
accelerated timing simulation with a powerful, interactive user interface. It
targets FPGA users who are migrating from schematic-based design to hardware
description language (HDL) synthesis. Galileo incorporates user-friendly
features such as schematic viewing of synthesis results and critical paths and
is entirely based on industry standards. It is the first synthesis environment
to use VITAL libraries and the V/System (VHDL) simulator from Model Technology,
Inc. to provide an interactive FPGA development environment with the same design
flow used by ASIC designers.
Pricing and Availability
Galileo pricing starts at $ 9,000 (U.S.) for Windows 95 or NT, and $ 13,500
(U.S.) for Sun and HP700 UNIX platforms. Synthesis libraries for Actel's Act
1,2,3 and 1200XL and VITAL libraries for Act 1, 2, and 3 are available at
Exemplar's FTP site for authorized customers.
About Actel
Actel Corp. is dedicated to providing logic designers with the capability
and confidence to move up to higher complexity designs. Actel is the world's
leading manufacturer of antifuse-based field programmable gate arrays (FPGAs)
and associated software development tools. Actel's cost-effective antifuse
architecture offers designers advantages in total system performance and maximum
gate utilization and high level design efficiencies, all resulting in lower
development costs and faster time to market. FPGAs are used in voice and data
communications, computing, medical, industrial controls and military and
aerospace applications worldwide.
Actel is traded on the NASDAQ market using the symbol ACTL and is located at
955 East Arques Avenue, Sunnyvale, CA 94086. Telephone 408/739-1010. Internet:
actel.com.
About Exemplar Logic
Exemplar Logic, a subsidiary and Center of Expertise of Antares Corporation,
pioneered applying logic synthesis techniques to the design of FPGAs and ASICs.
The company develops and markets EDA software tools. Its products are sold
worldwide through its U.S. sales offices and international distributors.
Exemplar's Galileo tool suite implements a complete high-level design (HLD)
solution for FPGA, CPLD, and ASIC design, offering synthesis, simulation and
timing analysis on Windows 95, Windows-NT, HP and Sun platforms. -0-
PAGE 4
Business Wire, February 12, 1996
Note to Editors: Galileo is a trademark of Exemplar Logic, Inc. Integrator
Series, 1200XL, ACT 2, and ACT 3 are trademarks of Actel Corporation. All other
trademarks are the properties of their respective owners.
Acronyms: ASIC: Application Specific Integrated Circuit; FPGA: Field
Programmable Gate Array; HDL: Hardware Description Language; HLD: High-Level
Design; VHDL: VHSIC (Very High Speed Integrated Circuit) Hardware Description
Language; VITAL: VHDL Initiative Toward ASIC Libraries; SDF: Standard Delay
Format.
CONTACT: Exemplar Logic
Georgia Marszalek, 415/345-7477 (Public Relations
Counsel)
Ashena Massoumi, 510/337-3720 (Product Marketing
Manager)
or
Actel Corporation
Gervais Fong, 408/522-4385 (CAE Relations Manager)
Chuck Byers, 408/522-4598 (Marcom Manager)
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