Here are some interesting comments from H.Stork and others on the industries expectations regarding the SSD market from
Memory Moves to Megafabs for NAND
David Lammers, News Editor -- Semiconductor International, 7/17/2008 8:00:00 AM::
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Hans Stork said that when he took the job as CTO at Applied Materials Inc. (Santa Clara, Calif.) nine months ago, he was astounded to learn just how large the memory fabs now being planned and built truly are.
“My jaw dropped,” Stork said, comparing Samsung’s plans with the relatively small fabs of the logic manufacturers. Intel Corp. (Santa Clara, Calif.), for example, may reach half of those wspm levels at its Dalien, China, fab, which may reach 70,000 wspm. However, most logic vendors run multiple products through their fabs and don’t need such huge volumes anyway.
One key driver is the escalating throughput of the scanners. The newest scanners are >140 wph. Stork said to justify the purchase of several ~$40M scanners, fabs must get bigger to feed those expensive lithography tools with a continuous flow of wafers. That is forcing the wafer processing equipment vendors to sharply boost the productivity of their own tools.
“These fabs are a factor of five bigger than what we used to think about,” Stork said, adding that the goal is to push through the highest number of wafers at the lowest possible cost to intersect the price/bit target needed to establish NAND-based SSDs. The biggest memory manufacturers are also racing to get to the 22 nm half-pitch, the technology generation where SSDs become attractive vs. the cost of hard disk drives.
Stork said that Applied’s management view is that “a big number” of megafabs will be built to supply the demand for SSDs in the notebook computer space, with SSDs for search engine servers supplying a smaller demand driver.
Janet Ramkissoon, an analyst at Quadra Capital Inc. (New York, N.Y.), said by her estimate there are at least five large shells sitting empty right now, waiting for a memory demand upturn to occur. “We are in an air pocket for the next couple of quarters,” she said.
A key enabler for the ultra-mobile computers will come when Intel moves to 32 nm and the “Moorestown” platform, which is the follow-on to the Atom processor now being manufactured at 45 nm design rules. That shift will come in 2009 or 2010, Ramkissoon said.
In the interim, memory manufacturers are losing money on each chip they ship, and a pricing recovery is badly needed. Then, as 32 and 22 nm technologies are realized, the density of flash chips will enable SSDs. “Scaling is needed, along with the megafabs, to make the SSD vision a reality,” she said.
Wally Rhines, CEO of Mentor Graphics (Wilsonville, Ore.), said storage demands will be driven as consumers become accustomed to downloading movies from the Internet on their phones and notebook computers. “NAND chips will be manufactured in incredibly large volumes. This is an opportunity for the memory manufacturers to scale up their factories. Yes, there will be periods of overcapacity, but if you don’t play now, you won’t play [in the memory business]. It is a capital intensive business.”
Tom Caulfield, executive vice president of sales and marketing at Novellus, at the company’s analyst event Monday, said, “We are in a temporary pause now in how our customers invest. They will come back, and when they do, they will come back in a vengeance. In a couple of quarters, our memory customers will need to add demand.”
Caulfield said, “SSDs are a key application for NAND in 2009-2010. In the 1980s, we had the era of the MPUs, and two-thirds of new fabs were for micros and one-third for memories. With the advent of NAND for digital media, that is reversed. They are diverging, with the big memory companies building megafabs and the MPU makers, with their high product mix, building smaller fabs. For the memory makers, once they get that fixed cost down, they need to spread it out over tremendous volumes.”
semiconductor.net
2009-2010 is going to be one of the most awe inspiring periods I have seen in the semi biz. Obviously these people are talking about 22nm NAND as a high probability... But will it be planar... or FeFET... or xFET?
If they shift to 3D/FeFET we at least know that there's a design level "road map" to <5nm with SBT or PZT. But at 22nm densities you wouldn't need to use a FeNAND device for the entire memory in an SSD. You could use the FeNAND as an embedded buffer while using cheaper high density "vanilla" NAND for the primary storage... assuming you can actually produce practical vanilla NAND at 22nm.
In any case they are going to need a memory system that performs better than today's IP to make people happy with SSD technology. But who knows... with those kinds of densities the waste of space with wear leveling schemes like rotating memory banks might be more feasible than they are now. And maybe they will find a way around the write speed and power drain of current NAND IP?
Perhaps a few clues will "escape" at this year's IEDM conference.
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