Err...but why do hotshot ASIC designers crank things out so much faster? For Fusion, we are not talking about needing new cores, just interface logic, a process switch for the GPU, and defining a new pinout and motherboard. How hard is that?
I'm baffled by the claims of complexity in transfering a working logic design like a GPU from one process to another. If the logic is verified, how much hand tweaking is still done in physical layout of digital designs? Isn't it mostly automated, including running simulations for timing closure? I can understand that AMD has not already switched existing ATI designs to SOI simply for cost reasons (I doubt AMD's SOI matches TSMC's bulk process cost) but for Fusion, they got to merge. They should have had a dual core, single GPU at 45nm shipping this quarter IMO, given how long they've owned ATI.
This is just extremely difficult stuff, otherwise everybody'd be doing it. Yes, years is what it takes.
It takes an enormous amount of effort to have bleeding edge Fabs, and a bleeding edge process to run in them. The next issue is a core which is both compatible and has high enough performance to sell profitably. Those are all very difficult things and take years to accumulate. The point here is not starting from scratch, but simply taking existing designs, getting them on a similar process, and doing some interface logic. |
