But then with tomorrow... you just never know:
SESSION C8/V10: Joint Session: Device Applications of Multiferroics
Chairs: M. Kawasaki and R. Ramesh
Wednesday Afternoon, December 3, 2008
Room 210 (Hynes)
1:30 PM *C8.1/V10.1
Ferroelectric Random Access Memory as a Non-volatile RAM in Multimedia Storage System. Kinam Kim and Dong Jin Jung; Memory business division, Samsung Electronics Co. LTD., Yongin-City, Gyunggi-Do, South Korea.
Thanks to the bi-stable state of ferroelectrics at near ambient temperature, ferroelectric memory has two important characteristics worth mentioning from the operational point of view. First, since core circuitry for the memory does not require stand-by power during quiescent state and the information remains unchanged even with no power supplied, it is thus non-volatile. Second, as the core needs to return the original state after being read, it is called a destructive read-out device. This is because the original information is destroyed after READ. As a consequence, it is essential to return the information back to its original state. This operation is so inevitable in the destructive read-out memory that ferroelectric cell capacitors cannot help suffering frequently from repeated polarization reversals. In particular, when the ferroelectric memory are used as one of the storage devices in computing system, such as byte-addressable memory, the memory has to ensure lifetime memory endurance, which is regarded as the number of READ/WRITE cycles that memory can withstand before loss of any of entire bit information. In the mean time, over the past decades, there has been enormous improvement in VLSI technology to implement system performance of computing platform in many ways. For instance, data throughput of CPU has been increased by thousand times faster than that emerged in the beginning of 1980s. By contrast, state-of-the-art HDD transfers data at 600 MB/sec. Note that data rate of the latest HDD is still orders of magnitude slower than those of the processor/system-memory. To achieve the throughput performance in more effective way, it is therefore needed to bridge performance gap in between each component. On one hand, to compensate the gap between CPU and system memory, CPU cache has been required and adopted. On the other, various technologies have been taken into account to bridge the gap between the system memory and the HDD. In this paper, authors are trying to attempt not only how FRAM provides multimedia storage system such as SSD with performance benefits but also what should be satisfied in terms of reliability in doing so. We demonstrate that FRAM is very eligible to become a non-volatile cache solution, providing benefits both of performance and of reliability. In performance, FRAM cache allows us to rid overhead of power-off recovery in flash translation layer: random WRITE performance has been improved by 250%. Utilizing FRAM as NV-RAM cache could also eliminate FLUSH, which is essential to ensure data integrity in a conventional type. In reliability, in order for FRAM to become NV-RAM cache in such system, what should be overcome is assertion of endurance cycles of 1e15. In line with this, we present what integration technology plays a critical role in achieving 1e15, which is scrutinized systematically and probed by statistical approaches applied to fatigue-data analysis in the latest FRAM.
2:00 PM *C8.2/V10.2
Development of Mass Production System and Process for Ferroelectric Films. Koukou Suu and Takehito Jimbo; Institute for Semiconductor Technologies, ULVAC, Inc., Susono, Shizuoka, Japan.
As for ferroelectric, pyroelectric-sensor etc. that use the bulk material have been used from of old as the functionality device. Recently, the range of use such as ferroelectric random access nonvolatile memories (FeRAM), piezoelectric inkjet printers, the blurring prevention sensors of camera, has extended greatly by developing the ferroelectric thin film. Especially, the miniaturization of all devices is expected from the low power consumption operation, and various developments are advanced. The most typical material is Pb(Zr, Ti)O2 (PZT), but the control of composition and crystalline of PZT thin films were very difficult so far. Moreover, it greatly influences the process, the back and forth such as upper and lower electrodes and the barrier films. We first developed the mass production for FeRAM with the PZT thin film by RF magnetron sputtering, and succeeded in the achievement of uniformity in the wafer, reproducibility and reliability of PZT thin films. Afterwards, the high temperature etching and the MOCVD technology had been developed as next generation FeRAM mass production. Moreover, piezo-electric MEMS mass production technology development has been done at the same time by applying the technology of the mass production sputter tool of FeRAM. In this study, we introduce these ferroelectric device mass production device and processing technology development.
3:30 PM *C8.4/V10.4
PZT based Ferroelectric Materials for Next Generation Mass-Production FRAM. Takashi Eshita1, Wensheng Wang1, Osamu Matsuura1, Hideki Yamawaki1, Satoru Mihara1 and Yoshihiro Sugiyama2; 1FRAM Process Engineering, Fujitsu Microelectronics Limited, Kuwana, Japan; 2Embedded Memories Department, Fujitsu Laboratories Limited, Atsugi, Japan.
Fujitsu and its newly established subsidiary, Fujitsu Microelectronics, have shipped about one billion FRAM chips since 1999. Our high performance ferroelectric capacitors which consist of sputter-deposited Pb(Zr,Ti)O3 (PZT) on Pt with an IrO2 upper electrode have been utilized in three different technology generation nodes of 0.5 µm, 0.35 µm and 0.18 µm FRAM. The operating voltage of the ferroelectric capacitors has decreased from 5 V to 1.8 V. We have developed capacitor fabrication processes to reduce the operating voltage without changing the capacitor materials. The key issue for low voltage FRAM is ensuring reliability such as charge retention with high fatigue endurance. With each FRAM generation, we have successfully developed ferroelectric capacitor fabrication technology while maintaining high the reliability with a 10-year guarantee. However, the next technology generation, 90 nm FRAM, will require new process technology for the ferroelectric capacitor material for lower voltage operation and smaller size capacitors. MOCVD PZT is the most promising material. With MOCVD PZT, a critical issue is to obtain PZT with good surface morphology and high (111) crystal orientation. We have developed a two-step growth or buffer layer technique, which drastically improves the surface morphology of PZT while maintaining good crystal orientation. The electric properties of this capacitor such as remnant polarization and leakage satisfy device specifications. In this presentation, we will compare our sputter deposited PZT and newly developed MOCVD process.
4:00 PM *C8.5/V10.5
Media Material Challenges for Probe based Memory Device. Qing Ma, Quan Tran, Nathan Franklin and Valluri Rao; Components Research, Intel, Santa Clara, California.
Probe based memory devices have the potential of extreme high storage densities based on the fact that direct contact mechanical sensing (AFM, e.g.) provides the highest spatial resolution as a detection mechanism. However, to realize the promise, the media material must be able to sustain such high densities. In this talk, we compare a few potentially viable material candidates, analyzing their advantages and limits from both practical and fundamental point of views. Emphasis will be on ferroelectric media.
4:30 PM *C8.6/V10.6
8Mb 1T-1C Ferroelectric Memory Array Embedded within a 130nm Logic Process. K. R. Udayakumar, T. S Moise, S. R Summerfelt, J. Rodriguez, K. Remack, H. McAdams and S. Madan; Analog Technology Development, Texas Instruments Inc., Dallas, Texas.
Nonvolatile semiconductor ferroelectric memories are distinguished by fast write speed, high read/write endurance, and low voltage, low power operation. Unlike floating-gate devices, F-RAM does not require power-consuming charge pumps. The dramatic growth in consumer-driven product markets fuels high demand for these nonvolatile memories in high performance or low power systems. This presentation is an overview of process engineering and integration approaches for the fabrication of area-efficient capacitor-on-plug stacked cell involving only 2 additional masks to the standard 130nm CMOS process, with 5LM copper backend. Full-bit functional data of a 8Mb embedded F-RAM device, along with retention reliability and endurance will be discussed.
11:00 AM C10.8
Large Area Epitaxial Ferroelectric Nano-capacitor Arrays with Near Tb/in2 Density. Hee Han2, Woo Lee3,1, Andriy Lotnyk1, Markus Andreas Schubert1, Stephan Senz1, Dietrich Hesse1, Marin Alexe1, Sunggi Baik2 and Ulrich M Goesele1; 1Max Planck Institute of Microstructure Physics, Halle, Germany; 2Materials Science & Engineering, Pohang University of Science and Technology, Pohang, South Korea; 3Korea Research Institute of Standards and Science, Daejon, South Korea.
Nano-scale ferroelectrics are still in the race for Gbit/Tbit nonvolatile memories. Lithography is widely used to reduce the size of data-storage elements for ultrahigh density memory devices. However, chronic edge damage and consequent deterioration to the properties due to unfavorable ion-beam or resist-based processing have been pointed out as major problems in the case of complex oxide heterostructures, and thus an alternative fabrication approach needs to be developed to achieve ultrahigh density ferroelectric memories. Here we report a unique approach for direct epitaxial growth of nanostructures, by which one can fabricate for instance arrays of individually addressable metal-ferroelectric-metal nanocapacitors with a density of about 0.2 Tb/in2. The process makes use of an ultra-thin anodic alumina membrane as a lift-off mask that can be used to fabricate large area periodic patterns of multilayered nanoscale structures at temperatures as high as 650 °C. It enables the realization of 2D extended arrays (typically, > cm2-scale) of structurally well-defined nanostructures, whose properties can be accessed by conventional characterization methods for bulk-materials, e.g., x-ray diffraction, superconducting quantum interference device measurements, etc. As demonstrated, complex structures such as patterned epitaxial multilayers and capacitors are easily achievable. [W. Lee et al., Nature Nanotechnology, doi:10.1038/nnano.2008.161]
11:15 AM C10.11
Epitaxial Integration of Ferroelectric Oxides on GaN. Elizabeth A Paisley1, Mark D Losego1, Spalding Craft1, Amit Kumar2, Venkatraman Gopalan2 and Jon-Paul Maria1; 1Materials Science and Engineering, North Carolina State University, Raleigh, North Carolina; 2Materials Science and Engineering, The Pennsylvania State University, State College, Pennsylvania.
Epitaxial integration of the ferroelectrics PbxZr1-xTiO3 (PZT) and BaTiO3 (BT) with wide band gap polar semiconductors such as GaN (0002) presents the possibility of electrostatically coupling the polarization vectors of these dissimilar materials. Further, the re-orientable nature of the ferroelectric dipole will allow the interface charge that must accompany the interfacial polarization discontinuity to be systematically modulated. Consequently, a new generation of smart transistors that are non-volatile, and simultaneously respond to electrical, thermal, or mechanical stimuli are envisioned. This presentation will describe the synthesis and characterization of these thin film heterostructures by magnetron sputtering, with specific attention given to process optimization. Using x-ray diffraction (XRD) and electrical characterization, the growth of epitaxial PZT and BT films directly on GaN was verified. In parallel, epitaxial PZT films were also grown on GaN with wide bandgap rocksalt buffer layers (~5 nm thick) such as MgO. A two stage growth process was developed for epitaxial PZT which required a deposition temperature of 300 oC and an ex-situ anneal at 650 oC. This combination was effective in mitigating interfacial reactions and promoting phase-pure perovskite growth. Films were grown to a target thickness of 85 nm. Electrical analysis of interdigital capacitors revealed a nonlinear and hysteretic dielectric response consistent with ferroelectric PZT. Piezoelectric force microscopy characterization has shown the films to be uniformly poled in the as-deposited state, evidence of ferroelectric switching, and suggests a high charge density at the PZT/GaN interface and coupling between the PZT and GaN polarization vectors. Current efforts continue to focus on electrical characterization and piezoelectric force microscopy characterization of these materials systems. The outcomes of these measurements and a comparison of structures with and without buffer layers will be presented.
mrs.org
0|0 |
