SI
SI
discoversearch

We've detected that you're using an ad content blocking browser plug-in or feature. Ads provide a critical source of revenue to the continued operation of Silicon Investor.  We ask that you disable ad blocking while on Silicon Investor in the best interests of our community.  If you are not using an ad blocker but are still receiving this message, make sure your browser's tracking protection is set to the 'standard' level.
Technology Stocks : Cymer (CYMI)
 Public ReplyPrvt ReplyMark as Last ReadFilePrevious 10Next 10PreviousNext  
To: Robert Scott who wrote (6598)10/27/1997 1:09:00 AM
From: Tim Bagwell  Read Replies (1) of 25960
 
Robert, I don't know how you made this connection but when we talk about .25 um or .1 um etc. we are referring to the width of the smallest feature that can be patterned on the wafer.

This feature is usually a line of metal such as aluminum and usually forms the base or gate of a transistor. The feature is usually imaged from a mask (negative or positive polarity) onto photoresist that has been spun on the suraface of the wafer. The laser exposes the resist with the mask pattern. Development of the resist then removes the unwanted resist material leaving holes. Metal may then be deposited onto the surface of the wafer through the resist holes. Of course, there are many variations on this theme and some are much more complex but this is the basic idea.

Wafer thickness is usually chosen for more mundane reasons such as strength or in some cases thickness may be minimized so that holes may be etched through.

Hope that helps clear it up.
Report TOU ViolationShare This Post
 Public ReplyPrvt ReplyMark as Last ReadFilePrevious 10Next 10PreviousNext  

HomeMailHotSubjectMarksPeopleMarksKeepersSettings
Terms Of UseContact UsCopyright/IP PolicyPrivacy PolicyAbout UsFAQAdvertise on SI
© 2026 Knight Sac Media.  Data provided by Twelve Data, Alpha Vantage, and CityFALCON News