All (except Intel's chirch members) - two pieces of complementary info, from:
sscs.org
Abstracts:
15.4 - A 450MHz IA32 P6 Family Microprocessor - 3:15 PM
J. Sch'tz, R. Wallace Intel Corp., Hillsboro, OR
"A third-implementation P6 microprocessor has 7.5M
transistors in a 131mm2 die in a 0.25mm process, and
achieves 450MHz. Circuits operate between 1.4V and 2.2V
to provide enhanced support for both mobile and servers.
A 3.6GB/s back-side bus supports two L2 cache types,
with up to 2MB on separate cache chips."
15.7 - A 0.25mm x86 Microprocessor with a 100MHz
Socket 7 Interface - 4:45 PM
R. Khanna, A. Ben-Meir, L. DiGregorio, D. Draper, R. Krishna, R. Maley, A. Mehta, S. Oberman, L. Tsai, T. Williams
Advanced Micro Devices, Inc., Sunnyvale, CA
"Performance increases up to 10% due to micro-
architectural improvements in the K6 microprocessor
family. Floating-point instructions enhance graphics
performance. A 100MHz socket 7 bus is implemented.
The 80mm2 die is in 0.25mm 5-layer-metal
CMOS with tungsten local interconnect, a standard
3.3V I/O interface, and a 2.2V internal supply." |
