Elpida on Track for 'Ultra-high-capacity DRAM'
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Jun 9, 2010 19:20 Masahide Kimura, Nikkei Electronics
Elpida Memory's roadmap of the " ultra-high-capacity DRAM"
The production lines that use TSV technologies
The company's roadmap of TSV technologies
Takao Adachi, CTO of Elpida Memory Inc, delivered a speech on the current status and future of through silicon via (TSV) technologies June 8, 2010, at the Shibaura Institute of Technology in Tokyo.
Elpida Memory is now developing technologies to start commercial production at production lines that use TSV technologies and were established by the company in 2009.
"We established a foothold for the commercial production in 2009," Adachi said. "And we aim to develop mass production technologies in 2010."
Elpida Memory plans to start the commercial production using TSV technologies in three steps. First, it intends to realize an "ultra-high-capacity DRAM," which is made by stacking DRAM core chips and interface chips with TSV technologies.
Adachi said that Elpida Memory has already paved the way to commercialize the ultra-high-capacity DRAM. The company prototyped an 8-Gbit DRAM by staking eight 1-Gbit DRAM cores in 2009 and will be able to realize a 16-Gbit DRAM by using eight 2-Gbit DRAM cores in 2010, he said.
In the second stage, Elpida Memory plans to realize an "ultrawide I/O" in or after 2011. With its low parasitic capacity, an ultrawide I/O stacks logic chips and DRAMs and increases the bus width to 512, 1,024 and 2,048 bits by using TSV technologies, which enable connection with multiple pins. As a result, it can realize a high data transmission speed such as of GDDR5 graphics memory at a lower frequency, Adachi said.
In the third stage, the company intends to establish a "system solution" to stack a variety of chips by using TSV technologies in or after 2012.
As a problem to be solved for the commercialization of TSV technologies, Elpida Memory cited the difficulty of testing.
"The most practical method is to mount a BIST circuit on silicon interposer and use a dedicated terminal," Adachi said.
As for the costs, the company is aiming at ¥10,000 (approx US$109) per wafer, he said. |
