Re: "Let me tell you that board level simulation/sysnthesis may have been a hot field 20 years ago but its just not a big deal anymore."
OK, I stand corrected. You know less than nothing.
Man are you ever out of touch with what's going on today.
Again Paul, I can tell you do not do this kind of work.
Do you think Alpha silicon specs are mature? Not hardly,
they go through multiple iterations. There are no databooks
at this stage! EMTS's with lots of TBD's.
Show me a 2 layer board from any PC manufaturer. Where is
power and ground? Show me a low speed 4 layer board from
Dell. No such animal.
The fact that you think any facet of this business is easy
from chip design to motherboard design shows little understanding.
PCB design synthesis was nowhere 5 years ago much less
20. Dell is driving all the major tool vendors in their
simulation solutions as well like Cadence, Viewlogic, Apsim
etc. etc. Transmission line analysis is only a small part.
You forgot EMI, Thermal, return currents, IBIS modeling,
ground bounce, crosstalk, plane analysis, rules management
auto place and route (which still has a long way to go).
There's thousands of things to consider for a concurrent design methodology.
Show me the good off the shelf sim/synth tools. They all
need LOTS of work.
Designing with "revolutionary" parts and architectures is actually
easier than what PC mfgrs face today with the rapid development
cycles. Many of the PC designs coming out today that are so
called evolutionary are actually revolutionary becuase many
of the new features and architectures have never been done
before. I know engineers who have left Dell because they could'nt handle the pace and design uncertainties they faced. Many went on
to other companies (ROSS, CENTAUR, IBM etc) to work on revolutionary technologies where they could narrow their focus and have more time to think.
Re: "I think that verifying operating voltage
range of the microprocessor is SO hard!"
Try again Paul. I know your'e joking right?
MEATHEAD
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