TriMedia does look expensive:
The TriMedia 2 is a five-issue VLIW design, able to handle five 32-bit
operations in the same 6.66-ns cycle, said Rathnam. All five issue slots
will be able to write to any of the chip's 27 function units. The
instruction length is variable from 26 to 42 bits. Although VLIW
processors are notorious for large code size, Rathnam said that the
TriMedia 2 will compress instructions so that most variable-length
instructions will require the minimum 26 bits. The chip includes 128
32-bit registers, and is capable of dual load-and-store operation.
Lots of silicon is needed for these operations. I don't see TriMedia being feasible for DVD decoding. It appears to be targeted at HDTV decoding, which it (supposedly) can do on-chip. This would pit it against CUBE's HDTV solutions. A VLIW processor will always occupy more silicon than a RISC processor, and therefore will cost more. All that circuitry generally consumes more power, too. However, VLIW processors do more in parallel, so they generally can run at a lower clock speed to accomplish the same task. CUBE uses a microSPARC RISC processor core, which can run at a high speed at lower power while using less silicon. A shrewd choice, I think. |
