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To: Douglas Nordgren who wrote ()	11/25/1997 4:08:00 PM
From: Douglas Nordgren	Read Replies (1) of 4808

Communications ICs -- HWP samples Tachyon Lite techweb.com EETimes 11/24 - By Loring Wirbel Palo Alto, Calif. - Hewlett-Packard Co.'s long-awaited Tachyon Lite controller chip for Fibre Channel arbitrated-loop applications moved into general sampling this month and was demonstrated in several applications at last week's Comdex Fall. The HFBR-5100 "TachLite" offers reduced protocol support for Fibre Channel, emphasizing Classes 2 and 3 for loop applications in mass storage, and leaving out the Class 1 protocol used in switching-fabric applications. TachLite includes a full 32/64-bit PCI interface meeting PCI v2.1 specs, said business development manager Jocelyn Weber, and the chip soon will be upgraded for v2.2 support. The chip can be used not only in host adapters and hubs for arbitrated-loop topologies, but even in many Fibre Channel switches for ports when the switch connects to a storage loop. The full Tachyon implementation is required only for ports in which full switching-fabric duties are mandated. In the loop Weber said that HP appears to be ahead of competitors in developing a product aimed just at arbitrated loops, where functions are optimized for small die size and lowest possible costs. In such arbitrated loops, TachLite can handle 13,300 I/O operations per second across a 32-bit PCI bus, compared with 10,500 I/O operations/s for the standard Tachyon. The HFBR-5100 is sampling in a 272-pin plastic ball-grid-array package, at a single-unit price of $150. High-volume prices will decline significantly as the product moves into production, with HP aiming at a sub-$100 price for TachLite in very high volumes. Call (800) 537-7715, ext. 9965 hp.com Reader Service No. 628 Copyright (c) 1997 CMP Media Inc.

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