Zeev, I'm not an expert on details of Si technology feature reduction, but the experts tell me that there are two circuits types that must be distinguished:
(i) memory circuits, where the limitation is set by what we were talking about, and there is perhaps another order of magnitude in feature reduction;
(ii) logic circuits, where limitations are (a) heat dissipated, and current state of the art is already pretty close to this limit; and (b) propagation delay, wich was bettered by the recent copper wire "superdiscoveries" from IBM and MOT, which, in fact, mean an incremental improvement of ~ 25% at best, and which set the cycle limit at about 0.3 nsec, which corresponds to clock rates of several GHz (compard with present state of the art of ~1 GHz). Here feature reduction has mostly already run its useful course.
Joe |
