SI
SI
discoversearch

We've detected that you're using an ad content blocking browser plug-in or feature. Ads provide a critical source of revenue to the continued operation of Silicon Investor.  We ask that you disable ad blocking while on Silicon Investor in the best interests of our community.  If you are not using an ad blocker but are still receiving this message, make sure your browser's tracking protection is set to the 'standard' level.
Technology Stocks : Compaq
 Public ReplyPrvt ReplyMark as Last ReadFilePrevious 10Next 10PreviousNext  
To: hpeace who wrote (9834)11/29/1997 11:19:00 PM
From: Meathead  Read Replies (3) of 97611
 
steve - the new 100Mhz local bus systems we'll be seeing in Q1/Q2
of next year won't be bottlenecked with slow cache. PentiumII
Slot1 already runs backside cache bus at 1/2 CPU core speed. For 300Mhz P2, that's 150Mhz L2 cache speed. P2 Slot2 will run backside
cache at full core speed... which will be 450Mhz in a few
months.

MEATHEAD
Report TOU ViolationShare This Post
 Public ReplyPrvt ReplyMark as Last ReadFilePrevious 10Next 10PreviousNext  

HomeMailHotSubjectMarksPeopleMarksKeepersSettings
Terms Of UseContact UsCopyright/IP PolicyPrivacy PolicyAbout UsFAQAdvertise on SI
© 2025 Knight Sac Media.  Data provided by Twelve Data, Alpha Vantage, and CityFALCON News