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Politics : Formerly About Advanced Micro Devices
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To: Maxwell who wrote (26286)12/1/1997 6:10:00 PM
From: Ali Chen  Read Replies (4) of 1572777
 
Maxwell: <The bottom line is that all 3 factors interact with each other and often difficult to sort out which is the speed limiter.>
This is not so difficult.

Let me suggest the following simplified model (for those of us who did not designed too many microprocessors:-). Let the gate in a design (A) has a propagation delay of <G>.

Let assume that some logical block in the CPU (A) has to have N gates connected sequentially to perform a certain function (instruction decoder, for example). Let say that this function need to be done in one clock, or by the next clock edge.

Then the signal propagation across this logical block would be delayed by about:

Del = G + G + G + ... = N*G + interconnection delays.

The CPU cannot run faster than F = 1/Del, this is the speed limit.

My point is that if you do not know the N, is is MEANINGLESS to discuss how bad is G in this particular PROCESS technology.

<It is silly to compare K6 and PII speed because they
have different architecture and layout.>
I hope you mean "gate design" and not "speed" here: the final CPU speed grade is the selling point (unfortunately).

What is really silly is to implicitly ASSUME that the N is the same for K6 and P-II, and pointifically rant about inferior Leff and Idsat of AMD gates.

Conclusion: Yousef is MEANINGLESS. Period.

Regards,

Ali
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