Formerly About Advanced Micro Devices Message Board

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Politics : Formerly About Advanced Micro Devices

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To: Ali Chen who wrote (26313)	12/1/1997 11:03:00 PM
From: Bill Jackson	Read Replies (1) of 1572780

Ali, Will not different areas of assorted gate delays all dance to the tune of the clock? As you speed it up you get closer and closer to one chain or another not being able to reach a settled state before the clock lowers the boom and the data error then is fed to the next stage. It may be a fatal error(freeze) or just bad data fed onwards. The settle time will be a function of how many gates etc have to settle and the speed they settle at. Optimal design will minimize the length these serial chains to allow for the fastest possible speed of the CPU. Sort of like cam float. Bill

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