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Technology Stocks : The New QLogic (ANCR)
QLGC 16.070.0%Aug 24 5:00 PM EST
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To: George Dawson who wrote (12918)12/4/1997 11:39:00 AM
From: iceburg  Read Replies (2) of 29386
 
George,

I am an engineer and a final payload of anything but a multiple of 2 makes no sense. 512, 2048, 65536 whatever but the bottom line is the underlying payload must be a multiple of two.

You get:

1.0625 Gbps x 2112 (payload)/2148 (payload + overhead) x 1 byte/10 encoded bits = 100.4
MBps

Using the 512 byte payload and the same number of bytes overhead (36 bytes) you get:

1.0625 Gbps x 512/548 x 1byte/10 encoded bits = 99 MBps

If there is more than one layer of protocol, then your example could theoretically make sense. I think I remember something about that is the explaination of cutback switching but I will have to revisit that.

I believe the reason 512 byte payloads were faster had to do with the ASIC and the extra step of composing a 2048 frame. I have no familiarity with their hardware or firmware so I can not speak with any certainty about it but I have a feeling the exceptionally low latency is specific to the 512 byte design. I hope someone can correct me if I am wrong.

The 512K design does not imply running at 1/4 speed, it simply means people interfacing to it would also need to use 512 byte frames.

I portion of the industry decided to go with 2K frames and thanks to market awareness by the likes of Carla and great engineering by Thomas et al, Ancor got this (2K) implementation done in time as well.

Steve
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