After reading the story, I would say at first glance, this is a few years away from production. But then what is PRODUCTION? Does production mean full scale production by one company or widespread use by the industry. And at what technology level???
Here's the rub:
1. Will the TI process wind up being proprietary and therefore restricted to TI production until proper licensing can be arranged by other companies?? (Remember, they DO go after patent infringers vigorously). If so, it will be years and years.
2. The speed being talked about is just what is needed for faster RAM and microprocessors. I would beleive the likes of the DRAM, SRAM, EEPROM, etal IC prodcurers and the microprocessor guys like INTC, IDTI, AMD, etal would jump through hoops to get this into production fast. The industry is crying for faster stuff everyday. Look how fast we went from the P90 to the PII-300+. The Memory guys are always looking for faster chips.
3. With the advent of the new technologies, new generations of equipment, new fabs and 300mm on the horizon, something like this would most certainly be rushed along to be incorporated simultaneously.
These 3 items seem to indicate a fast track for this. It is further substantiated from the previous IBM announcements concerning copper interconnect.
Now for the BIG RUB:
Two of the more significant reasons for new device technology (smaller designed feature sizes) are more cost effective manufacturing and enhanced performance (speed). Both are usually achieved with shrinking the design library, developing new processes and icreasing the diameter of the wafer processed.
HOWEVER, smart comapnies may now be given a great opportunity to put their COO (Cost of Ownership) models to good use. The cost of a new fab is astronomical by past standards. Look at the new MOT facility in Virginia. It will run close to $3 billion of which close to 1/4 of the cost will be brick and mortar. That means 3/4 will be for the new advanced equipment.
WELL, we have all read about the underutilized, under capacity or close to obsolete facilities out there that have not been fully depreciated and paid for since technology moved faster than the payback period intended. In other words, those $1 billion plants didn't really pay for themselves as they were expected to and now more investment is being required. This coupled with declining ASPs and margins due to competition. Older fabs are being shutdown, sold, rennovated, or mothballed because they can no longer provide the capabilities required out in the marketplace. Most of this is either cost or technology driven.
WHAT IF the speed and performance issues can be addressed with both copper and lower k dielectrics, among other things at the present technological feature sizes, eliminating the need to go to the next shrink (with its inherent issues and costs)? You haven't addressed the cost efficiencies you might get with 300mm and smaller feature sizes in a new facility, but, maybe you did!!!! What if your COO showed that you could revitalize your existing wafer fabs with well established 200mm equipment and get the next level of performance at little cost and improve cost efficiencies by using the almost depreciated existing fabs.
Don't think this is too bizarre since SMIF and minienvironments (ASYT) were used to extend the useful life of existing facilities for 1-2 process generations and/or dramatically reduced wafer costs. It's true we did go to the next smaller feature size designs, but it was done for added cost efficiencies, performance, and speed. IT was done at very little cost relative to building a new facility.
With the always mentioned "extra underutilized" capacity already in existence, it may seem ludicrous to build more fabs for technological advances in performance when things such as copper and low k dielectrics could provide that edge within the existing infrastructure.
When all is said and done, the real name of the game is speed, performance, AND cost to manufacture the device that drives this industry. The depreciation on a $3 billion fab is massive compared to that of the older $0.5-1.5 billion fabs already in operation. It has been my experience that the end user doesn't give a damn whether their devices were made using a 2.0 micron, 1.0 micron, 0.5 micron, or 0.25 micron feature size design rule as long as the price is right and the chip meets the performance criteria of the end customer. With that said, the larger feature sizes would inherently have higher reliability because killer defects could possibly be minimized.
You have one man's opinion, from a practical financial side of things. Only the COO model, a bunch of engineers, and the finance analyst, put in a room to crunch the numbers can determine whether this makes sense for their company.
I am very bullish on the Semiconductor Sector and do not think this scenario really affects the overall picture since new equipment will be ordered for existing facilities, and new fabs will be built when the older ones are running at full capacity. The excess equipment inventory from the obsolete fabs that would have been shut down and sold to equipment brokers for recycling to even older fabs would diminish causing an increase in new equipment orders from those same fabs that were using the cast offs from the "big boys". I see the equipment sector still healthy and, as a matter of fact, more healthy relative to the huge R&D costs they are expected to bear bringing on the 300mm product line over the compressed timeframe expected.
Andrew Vance |
