Paul,
RE: Slot1:
In fact, it's probably the cheapest way to achieve high-reliability, high-performance, tight linkage between the cpu and cache.
In P-II, it wasn't worth the effort from technical point of view. I think it makes some sense in Deschutes, where L2 will run at the clock speed of the CPU and is intended for higher end.
The alternate approaches are:
-Socket 7 with L2 on motherboard - Pentium, K6, 6x86
-No L2 - future version of P-II, MediaGX, future version of MediaGX
-L2 as part of the CPU die - future versions of K6 and P-II
Performance tests show the clear superiority of the Pentium-II in 32-bit operation, so it obviously works.
I don't think we should go back to over the old arguments. Just in case you missed them, Cyrix 6x86MX PR233 delivers about the same results on benchmark tests as P-II 233. But the Cyrix chip runs at 188 MHz. If this says anything to me, it is that either Slot 1 doesn't delver anything over Socket-7, or that P-II core is sub-par at best.
The original plan Intel had was to use proprietory design to lock out the competition, and charge monopoly prices. Under this scenario, extra cost of Slot 1 was irrelevant.
But we are operating under plan B now. (and there was no plan B). So Intel is mainly reacting to changes occuring in marketplace, rather than driving them.
Joe |
