Multi-Channel Data Communications on Fixed-Point DSP Architectures
Stuart Harker, Arda Erol, Spectrum Signal Processing Inc., Canada:
icspat.com
Abstract
This paper will discuss some of the require-ments and issues surrounding the implementa-tion of multi-channel communications on fixed-point architectures. Topics include: spawning, task switching synchronization, and MIPS and memory constraints. The impact of multi-tasking and load-balancing will be examined, as well as, advantages and disadvantages of the Texas Instruments TMS320C6x architecture.
Introduction
Current high density multi-channel data communications solutions rely on an array of discrete DSP devices, each handling a single data stream. As more powerful DSP architec-tures, such as the TMS320C62xx, become avail-able, multi-channel communications solutions on a single DSP device become possible.
To allow developers to create effective solu-tions, robust architectures need to be supported. At the heart of a multi-channel design is the DSP Real-Time Operating System (RTOS). The DSP RTOS ensures real-time deliverables, re-entrancy of algorithms, and efficient resource usage. The DSP hardware architecture and DSP software structure also impact the overall system performance.
The system elements to be considered in the multi-channel system can be broken into exter-nal and internal components. The internal con-siderations of the RTOS, namely, spawning, task switching, synchronization, MIPS, and memory management will be addressed after the external elements, such as the signaling bus environment and the DSP platform.Signal Computing System Architectural Overview
The move from a single pump design to a multi-channel implementation, requires a num-ber of additional hardware and software compo-nents to multiplex and distribute the communi-cation data stream.
Multi-channel CT (Computer Telephony) systems are usually set up to interface with a number of T1 lines on the PSTN. A T1 line consists of 24 DS0 channels multiplexed into 125 ms frames. These lines are handled by a line interface card (see Figure 1), and are sent onto a communications bus, such as SCbus 1 or MVIP 2 . Hardware definition and software control of these buses are handled by SCSA, the Signal Computing System Architecture.
The SCSA consists of openly defined, modular hardware and software computer ele-ments. These include multi-vendor/multi-resource application components, a specialized Time Division Multiplexed (TDM) bus, high-level, APIs (Application Programming Inter-faces) and lower-level hardware SPIs (Service Provider Interfaces). It can be divided into the SCSA Hardware Model and the SCSA Teleph-ony Applications Objects (TAO) Frameworks.
1 Copyright 1994 Dialogic Corporation
2 Copyright 1994 GO-MVIP Inc.Multi-channel Data Communications on Fixed-Point Architectures
Stuart Harker Spectrum Signal Processing Inc. Burnaby, British Columbia, Canada email: Stuart_Harker@spectrumsignal.com |
