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Technology Stocks : Alliance Semiconductor

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Jul 10 5:00 PM EST

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To: Keith Allen who wrote (2258)	1/9/1998 7:53:00 PM
From: Ken Muller	Read Replies (1) of 9582

Keith: You wrote<<, with standard cell P&R the die size should be smaller than the sum of the individual chips>> Not true. Dram processes are simpler and different than asic/gate array processes. P & R has nothing to do with it.That's why Dram suppliers can't instantly switch products when prices are down. If you try to make a 16 meg dram on an equivilent asic process, you will see at least a 50% die increase. This is not my opinion. It's a fact. If you need further information on this, you can post on the Micron thread. They have some sharp technical guys that can provide more background. Ken

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