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Technology Stocks : AMD:News, Press Releases and Information Only!
AMD 203.76-1.1%Nov 21 9:30 AM EST

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To: greg nus who wrote (3800)1/14/1998 7:52:00 PM
From: Petz  Read Replies (2) of 6843
 
Why 0.25 ramp might be better than 0.35

1. Die size.
81mm^2 for Chompers (K6-3D), 162mm^2 for K6. Probability of a defect occuring in a chip at a particular processing step is proportional to the die size for "defect driven yield" (Quote from conference call). Suppose there are 15 processing steps and the probability of a defect is 0.1 for the 162mm^2 die. Then the overall yield will by 0.9^15, which is 20.6%, pretty ugly. The probability of a defect on an 81mm^2 die would be 0.05, and the overall yield would be 0.95^15, or 46.3%. Of course, this is a simplification since some "defects" affect the whole wafer, not all steps introduce same amount of defects, alignment 30% more critical for 0.25, etc, etc

2. The number of candidate die per wafer increases by more than 100%. (The reason for "more than" is less wasted space around the edges of the circular wafer.) Thus, even if the yield % is lower, the number of good "Chompers" can go up!

3. Application of "lessons learned." One of these lessons is to copy SDC's lead and not change it. Another is that "wet process steps" should be avoided.

4. The conference call indicated that all steps of the 0.25 process had been done at Austin, even though there was no 0.25 "assembly line" there. Presumably, SDC has verified that the results obtained in Austin for each step were the same as Sunnyvale SDC's.

5. The 0.25 process is not introducing any "new technologies" in chip geometry. 5-layer, local interconnect are not new.

Petz
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