Market info on the CMP slurry business that NANX (MOYC/CEM) are selling to the semiconductor industry:
Friday January 16, 11:14 am
WILLIAMSBURG, Va.--(BUSINESS WIRE)--Jan. 16, 1998--The
worldwide market for Chemical Mechanical Polishing (CMP)
modules for semiconductor planarization reached $357.1
million in 1997, up 56.1% over 1996, according to the
report CMP Technology: Competition, Products, Markets,
recently published by The Information Network, a
Williamsburg, VA-based market research company.
''The dramatic growth was on the heals of a 40.5% increase
in 1996. The worldwide market will grow to $555.6
million in 2000. For 1997, 785 modules were shipped and
863 modules booked, bringing the installed base to 2,007
modules. This represented an increase of 80.0% from 1996,''
notes Dr. Robert N. Castellano, President of The Information
Network. ''Polishers from different manufacturer can
process from one to six wafers at a time so that a single
polisher can have one to six modules. On a unit basis,
300 polishers were shipped in 1997.
IPEC (NASDAQ) had a 60.7% share of the 1997 market,
followed by SpeedFam , based on number of tools shipped.
More than 50% of IPEC/Planar's 182 unit shipments was of
the low-priced, single-head design. As a result,
IPEC/Planar's share of the market, based on the number
of modules, was 43.3%, followed closely by SpeedFam
with a 35.9% share. Because of the lower price of its
single-head system, IPEC/Planar's share of
the 1997 market, based on revenue, was 38.2%, followed
closely by SpeedFam at 31.0%.
Driven by the needs in the semiconductor industry for
planar wafers across the die and across the wafer,
CMP has emerged as the technology of choice among
semiconductor manufacturers. While other planarization
methods are satisfactory on the 0.35 fm and above
regime of feature sizes, only CMP offers exemplary
capabilities below 0.35 fm.
The advantages of CPM are:
-- Improved global planarity over non-CMP methods
-- Compatible with any conventional dielectric
-- Global planarity at 0.35 fm or less feature sizes
-- Reduced process steps, particularly lithography
-- Can define horizontal and vertical wiring
-- Alternative to some defect-prone processes
such as etch-back
-- Reduced defect density
-- Can provide alternative architectures such as
damascene
The Information Network is a leading consulting and market
research company addressing the semiconductor, computer, and
telecommunications industries.
theinformationnet.com
tin@theinformationnet.com The Information Network
Dr. Robert N. Castellano, 757/258-3738 |
