Jim,
Re -- PentiumII w/o cache...
IMO currently all possibilities will be explored, with the objective of optimizing cost/performance. This includes PII on MB, on ZIF socket, on slot 1, with various types of packaging, various cache configurations etc...
In each of these possibilites, the issue of the market it addresses, the proliferation of different MB's in this space and the upgrade logistics, future directions in this market space, distribution methods (box vs plain), sales and marketing, manufacturing issues etc.. will be considered.
IMO The best possible alternative will be chosen.
To answer your question, if the cacheless PII (this appears temporary), the on chip L2 cache PII etc. were to be adopted and system vendors require a migration path to their slot 1 MB's then a slot1 adaptor could be used instead of a pentiumII (the SEC connector remaining the same)
Stockman |
