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Technology Stocks : WDC, NAND, NVM, enterprise storage systems, etc.
SNDK 239.51+15.3%Nov 7 9:30 AM EST

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To: Sam who wrote (4513)12/7/2020 5:47:26 PM
From: Elroy  Read Replies (1) of 4824
 
This is SK hynix's third generation to feature their Periphery under Cell (PUC) design to reduce die size by placing peripheral logic under the memory cell array, similar to Intel and Micron's CMOS Under Array design. (SK hynix refers to the combination of this die layout and their charge trap flash cells as "4D NAND".) Changes with this generation include a 35% increase in bit productivity (only slightly less than theoretically possible with the jump from 128 to 176 layers) and a 20% increase in cell read speed. The maximum IO speed between NAND dies and the SSD controller has been increased from 1.2GT/s for their 128L NAND to 1.6GT/s for the 176L NAND.

All the NAND makers claim that their approach to NAND development is the bestest in the world, and their NAND is better and more cost effective than their competitors.

Does anyone know what is going on in terms of market share shifts that indicates some NAND makers are outperforming others?
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