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Technology Stocks : General Lithography

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To: Andrew Vance who wrote (757)	2/5/1998 7:28:00 PM
From: D. K. G.	Read Replies (2) of 1305

Andrew, I have a question in regards to current lithography design rules industry wide and the future roadmap. Memory(DRAM) is now crossing the 0.25uM threshold. What about Logic, ASIC, DSP ? and other any other significant chip segment I've failed to mention. For instance the 98 expectations for ASMLF's stepper mix is a 50% DUV to I-line.It is looking like the other stepper makers are also shipping the same mix. From what I've read. On the other hand, Dallas Semi's products are undergoing shrinkage but I think they still are able to use .60um design rules for most of what they make. Eventually they will move lower. I'm just trying to get a sense of how the migration to DUV will progress among the various chipmakers. I've taken the liberty to set up a chart to help better phrase my question. Please edit and include items as you see fit. __________________________% DUV Chip Segment_____98_____99____00____01_____ DRAM____________ 50 Logic ASIC DSP Others I'm omitting ? I hope my question makes sense to you. Thank you for your time and effort contributing to SI on this forum. Regards, Denis

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