SI
SI
discoversearch

We've detected that you're using an ad content blocking browser plug-in or feature. Ads provide a critical source of revenue to the continued operation of Silicon Investor.  We ask that you disable ad blocking while on Silicon Investor in the best interests of our community.  If you are not using an ad blocker but are still receiving this message, make sure your browser's tracking protection is set to the 'standard' level.
Technology Stocks : General Lithography
 Public ReplyPrvt ReplyMark as Last ReadFilePrevious 10Next 10PreviousNext  
To: Andrew Vance who wrote (760)2/6/1998 2:04:00 AM
From: TI2, TechInvestorToo   of 1305
 
<The above is really the big rub. Non Memory devices used to be 1-2 process generations behind Memory and CPU device technology. As the life cycles of design rules (critical feature sizes) get more and more compressed, it seems that we are about to reach parity in the industry.>

I believe this is occuring for mainstream now. IMHO this parity occurred with the technical performance leaders a few years ago. I also believe that small linewidths (but relaxed specs) is a great way to reduce costs of older chip designs by the reduced cost, die shrink routes (ie 16 MB DRAM @ 250 nm ground rules===lotsa teeny tiny die/wafer, then the market dropped!) for the cost leaders.
Thanks again for great posts.
TI2
Report TOU ViolationShare This Post
 Public ReplyPrvt ReplyMark as Last ReadFilePrevious 10Next 10PreviousNext  

HomeMailHotSubjectMarksPeopleMarksKeepersSettings
Terms Of UseContact UsCopyright/IP PolicyPrivacy PolicyAbout UsFAQAdvertise on SI
© 2025 Knight Sac Media.  Data provided by Twelve Data, Alpha Vantage, and CityFALCON News